Top Engineering Jobs

Lead mechanical construction for semiconductor fabs and cleanrooms, ensuring HVAC, exhaust, chilled water, CDA/PCW and other utilities meet contamination-control, safety, cost, schedule, and quality objectives. Oversee design reviews, construction coordination, commissioning, RFE/RFM readiness, handover documentation, and operations transition while driving change management, safety compliance, and continuous improvement.

Develop and optimize dry etch process conditions, improve process capability and yield, reduce production cost, set process parameters for semiconductor equipment, evaluate and introduce new equipment/materials, and perform abnormality analysis and corrective actions.

The US Expansion Planning Engineer at Micron will optimize equipment capacity, analyze financial data related to new equipment, and improve planning processes through collaboration and data analysis.

Lead CMP process development, characterization, and transfer for 3D NAND nodes. Drive yield, manufacturability, cost reduction, process monitoring, supplier engagement, and cross-site projects while applying failure analysis and AI-driven process improvements.

Design, lead and deliver standard-cell layouts for new DRAM technologies. Own project lifecycle from spec to PPA-qualified library release, perform LVS/DRC/latchup verification, develop flows and automation, collaborate with DTCO, Process, CMOS and CAD teams, mentor junior engineers, and use AI-assisted workflows to improve productivity.

Design and implement SystemVerilog RTL and microarchitectures for AI-optimized memory systems; perform synthesis and PPA analysis; document microarchitecture; evaluate tradeoffs and drive implementations from specification through silicon.

The role involves maintaining and managing semiconductor manufacturing equipment, performing daily inspections, and supporting cost improvement activities while ensuring adherence to work procedures.

Lead high-speed PCB design for SSD products and form factors (EDSFF, U.2), focusing on DDR/PCIe/ONFI interfaces, PDN routing with PMICs, SI/PI/EMC compliance, DFM/DFA, documentation, cross-functional collaboration, troubleshooting, and AI-assisted workflow improvements.

The Staff/Principal Engineer will lead dry etch process development for NAND technology, collaborating with cross-functional teams and mentoring peers while managing technical projects and presenting technology roadmaps.

Design and analyze digital and analog memory circuits (arrays, control logic, datapaths, decoders) using simulation and layout tools. Optimize power, speed, die size, manufacturability, and apply AI-enabled tools to improve design flow while collaborating with cross-functional teams for validation and product readiness.