Top Engineering Jobs

Design and optimize physical IC layouts, collaborating with design, product, process integration, probe, and assembly teams to ensure manufacturability, cost, quality, reliability, and time-to-market. Use Cadence Virtuoso and layout verification tools, apply CMOS/VLSI and standard cell/analog techniques, and incorporate AI-enabled layout assistance. Document designs and communicate across teams.

Design and deliver RTL for complex DRAM digital and mixed-signal blocks; perform front-end quality checks (lint, CDC/RDC), synthesis, timing constraint development (SDC), STA, power optimization (UPF), and collaborate with architecture, verification, and physical design to meet PPA targets and improve RTL-to-GDS flows.

Lead the development of reliability test flows and reduce DPM while managing cross-functional collaboration to enhance HBM product quality and efficiency.

Lead sustaining and new-product HBM design work: analyze and resolve silicon issues, implement and verify design updates, improve yield/reliability, support customer bring-up and system-level debug, and collaborate with cross-functional teams to drive complex technical issues to closure.

Participate in semiconductor technology research and development projects: perform experiments, data analysis, modelling/simulation, and device characterization; generate technical reports, recommendations, and present findings. Leverage AI/ML and advanced analytics where applicable and collaborate with engineers to support process integration and next-generation memory technology development.

University internship supporting semiconductor manufacturing engineering teams to analyze production data, perform root-cause investigations, and develop data-driven improvements for yield, quality, equipment reliability, and operational efficiency. Interns may use analytics, automation, and AI-enabled tools and will deliver technical reports and a final presentation.

The Senior Engineer will design and optimize analog circuits, manage the layout process, perform verification, and collaborate across groups to ensure manufacturability of products.

The role involves optimizing NAND module processes, leading cross-functional teams, developing solutions to improve product yield and quality, and managing technology transfer from R&D to manufacturing.

The Principal Design Engineer leads the design and implementation of NAND datapath circuits, manages timing analysis, and mentors other engineers. Responsibilities include circuit ownership, physical design, simulation, and collaboration across teams.

The Staff/Principal Engineer will support material quality, filtration strategy, and risk mitigation initiatives globally, collaborating with teams to align technical requirements and improve manufacturing performance.