Verification Staff Engineer - Analog Mixed-Signal

Posted 8 Days Ago
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Hiring Remotely in Kodair, Mahbūbnagar, Telangāna, IND
Remote
Senior level
3D Printing
The Role
Owns analog and mixed-signal design verification activities for integrated circuits and subsystems. Develops verification plans, reusable UVM-based environments, testbenches, tests, checkers, coverage models, and behavioral models using SystemVerilog and Verilog-AMS. Performs simulation, regression, RTL debugging, risk identification, and verification completeness analysis. Collaborates with analog, digital, systems, validation, and test teams while providing technical guidance to verification engineers.
Summary Generated by Built In
Job Description

Principal Accountabilities: 

  • Execute and own assigned design verification activities that support first-pass silicon success and confirm compliance with performance, power, and schedule requirements.
  • Own or contribute to analog and mixed-signal verification of integrated circuits or subsystems.
  • Collaborate with AMS DV team members and local contract DV resources on assigned verification activities.
  • Contribute to verification strategies for mixed-signal IPs and implement verification IP using object-oriented programming principles and methodologies, including UVM.
  • Verification planning, maintenance, feature extraction, verification tests, coverage and checker development.
  • Develop efficient, reusable state-of-the-art verification environments and testbench structures.
  • Participate in technical reviews with analog and digital design, systems, test, validation, and verification teams.
  • Able to debug the RTL for design intent and interface with cross-functional teams and collaboration in all verification related activities.
  • Provide technical guidance and support to verification team members within assigned areas of expertise.

 

Key Performance Measures: 

  • Deliver high-quality verification plans, environments, tests, checkers, and coverage within agreed project schedules.
  • Identify verification risks, communicate issues promptly, and contribute to effective mitigation plans.
  • Achieve verification completeness against approved specifications and coverage goals.
  • Develop reusable verification components and improve verification efficiency.
  • Provide clear technical documentation and share relevant knowledge with the verification team.
  • Collaborate effectively with design, systems, test, validation, and other verification engineers.
  • Demonstrate the Spirit of Renesas in all aspects of work.

Qualifications

Knowledge, Skills and Experience: 

  • The ideal candidate has an experience of 5+ years in advanced verification methodologies, owning the verification of complex digital and mixed signal designs
  • Degree level qualification in electrical engineering, electronics, computer engineering, computer science, or equivalent.
  • Strong fundamentals in analog and mixed signal circuit concepts and topologies.
  • Experience working with mixed signal verification environment, simulation, and regression tools such as Cadence Virutuoso, xCelium, Incisive, vManager, IMC
  • Ability to read analog schematics and extract related main functionality.
  • Familiar with Verilog based RTL coding and ASIC design methodology.
  • Strong proficiency in SystemVerilog and advanced verification methodologies, including assertions, constrained randomization, metric-driven verification, and UVM.
  • Familiar with behavioral modelling of analog blocks using System Verilog (RNM) and VerilogAMS.
  • Experience in modelling mixed signal blocks including biasing networks, power regulators, bandgaps, simple amplifiers, comparators, data converters, mixers, multiplexers, switches, power converters, etc.
  • Experience modelling power converters is desired.
  • Good knowledge of UNIX shell scripting, Perl and TCL scripting.
  • Proven experience in writing verification plans and test bench development, simulation and debugging.

General:

  • Concise and proactive communication skills within a multi-site and multi-cultural environment
  • Ability to communicate technical recommendations clearly and build alignment based on technical facts.
  • Ability to support technical discussions with internal stakeholders, customers, or partners when required.
  • Takes responsibility for solutions and makes them happen, self-motivated.
  • Looks for continuous improvement in own and Renesas work practices.
  • Good analytical and problem-solving skills.
  • Results-oriented and able to deliver on-time under tight schedule pressure.
  • Ability to propose innovative solutions.
  • Cross cultural awareness and sensitivity

 

Additional Information

ルネサスは、「To Make Our Lives Easier(人々の暮らしをより豊かで快適にする)」というPurposeのもと、組込み半導体ソリューションを提供するグローバル企業です。世界30か国以上で活躍する21,000人を超えるエンジニアや課題解決のプロフェッショナルとともに、自動車、産業、インフラ、IoT分野における世界最先端のテクノロジー開発に携わり、より安全で、健康的で、環境にやさしく、スマートな未来の実現に貢献しています。 

 

ルネサスでは、「TAGIE(Transparent、Agile、Global、Innovative、Entrepreneurial)」を企業文化の中核としています。TAGIEは、私たちの働き方や成長のあり方、そしてPurposeの実現に向けた取り組みを支える共通の価値観です。この協調的な精神と挑戦するマインドセットが、半導体技術を通じた産業の変革と、世界中の人々の暮らしへの貢献を可能にしています。 

 

私たちは、競争力のある報酬制度に加え、充実した福利厚生をご用意しています。福利厚生の詳細については、選考プロセスの中でご案内いたします。 

 

私たちとともに未来を創造する挑戦に、ぜひ参加しませんか。皆さまからのご応募をお待ちしております。 

Skills Required

  • 5+ years of experience with advanced verification methodologies and ownership of complex digital and mixed-signal designs
  • Degree in electrical engineering, electronics, computer engineering, computer science, or equivalent
  • Strong understanding of analog and mixed-signal circuit concepts and topologies
  • Experience with mixed-signal verification environments, simulation, and regression tools including Cadence Virtuoso, Xcelium, Incisive, vManager, or IMC
  • Ability to read analog schematics and extract primary functionality
  • Familiarity with Verilog RTL coding and ASIC design methodology
  • Strong proficiency in SystemVerilog, assertions, constrained randomization, metric-driven verification, and UVM
  • Familiarity with behavioral modeling of analog blocks using SystemVerilog RNM and Verilog-AMS
  • Experience modeling mixed-signal blocks such as regulators, bandgaps, amplifiers, comparators, data converters, mixers, multiplexers, switches, and power converters
  • Experience modeling power converters
  • Good knowledge of UNIX shell scripting, Perl, and Tcl scripting
  • Proven experience writing verification plans and developing, simulating, and debugging testbenches
  • Concise, proactive communication and collaboration skills in multicultural, multisite environments
  • Strong analytical, problem-solving, technical communication, and delivery skills

Renesas Electronics Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Renesas Electronics and has not been reviewed or approved by Renesas Electronics.

  • Fair & Transparent Compensation — Feedback suggests pay is generally fair-to-good across many roles, with base pay aligned to prevailing market levels in multiple U.S. locations. Engineering and leadership tracks can be competitive on total compensation, reinforcing a sense that pay can meet market expectations in key job families.
  • Healthcare Strength — Feedback suggests core medical, dental, and vision coverage is solid and well-regarded by employees. Day-one eligibility in U.S. roles is described, supporting confidence in access and continuity of care.
  • Leave & Time Off Breadth — Feedback suggests PTO, paid holidays, sick time, and parental leave provide a comprehensive time-off framework. Company initiatives like Renesas Day and meeting-light Focus Fridays further support time away and balance.

Renesas Electronics Insights

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The Company
HQ: Tokyo
10,040 Employees

What We Do

We're the world's leading semiconductor manufacturer. Our mission is to make our lives easier and a world that's safer, healthier, greener, and smarter.

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