Sr. Principal Technical Quality Engineer

Reposted One Month Ago
Be an Early Applicant
3 Locations
In-Office
154K-286K Annually
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
The Technical Program Manager will oversee R&D projects and customer engagements, ensuring effective project execution, stakeholder communication, and team collaboration.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Work with the Cadence global silicon solutions teams who are designing semiconductor IP for the top electronic product companies in the world, in leading edge semiconductor processes, using the latest industry tools and methodologies.  As a Technical Quality Engineer and member of the Silicon Solutions Group global quality team, you will collaborate with IP design teams, methodology teams, CAD teams, and engineering management, to ensure that we are constantly improving our processes and consistently delivering the highest quality product to our customers.  You will be the quality champion for one or more design organizations within SSG and be responsible for analyzing design defects to determine root causes, defining design QA and release QC processes, and maximizing the efficiency of these processes through implementation of agentic AI systems.  You will communicate key information to senior engineering management by summarizing and interpreting the quality metrics that measure the effectiveness of our quality systems.  Finally, you will participate in quality certification activities for standards such as ISO 9001, and support foundry IP quality programs for leading foundries.

Location

  • On-site in one of the North American design centers (Austin, Cary).

Requirements

  • Education: MSEE
  • Experience: 7+ years
  • Hands-on experience in one or more areas of analog or digital IC design or verification, or experience in silicon fabrication quality assurance/control with a working knowledge of analog or digital silicon design flows.
  • Experience in analog IC design is a plus.
  • Experience in defect management and defect analysis processes such as RCA, 5Why, 8D is a plus.
  • Strong communication skills, quality consciousness, proactivity, and sense of responsibility.
  • Strong problem analysis and teamwork skills.

Responsibilities

  • Actively participate on the global SSG Quality Team.

  • Represent the SSG Quality Team to customers and partners.

  • Work across the global organization to implement improvements to flows and procedures.

  • Define and maintain quality procedures for multiple design teams.

  • Improve effectiveness and efficiency of quality procedures through implementation of agentic AI systems.

  • Generate, interpret, and communicate quality metrics.

  • Perform Root-Cause-Analysis and identify Corrective Actions.

  • Hold Post-Mortem reviews and summarize and communicate results.

  • Assist design teams in preparation of Failure Analysis reports.

  • Maintain quality certifications such ISO 9001 and ISO 26262.

  • Support participation in external semiconductor foundry quality programs.

Be proud and passionate about the work you do. Together, our One Cadence -- One Team culture drives our success. 

The annual salary range for California is $154,000 to $286,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • hands-on experience in digital design and mixed-signal design
  • minimum 5 to 7 years of relevant work experience
  • proven experience in managing designs and teams from conception to manufacturing
  • knowledge of end-to-end design flow and tools for analog and digital design
  • MSEE

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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