Staff Layout Engineer

Posted One Month Ago
Be an Early Applicant
Hiring Remotely in Yishun, SGP
Remote
Senior level
Software • Semiconductor • Manufacturing
The Role
Senior IC layout engineer responsible for high-quality layout and verification for memory, I/O and standard cells at advanced submicron nodes. Tasks include floorplanning, layout implementation, DRC/LVS/ERC/Antenna/EM verification, methodology documentation, mentoring junior engineers, and meeting schedules. Must relocate to Singapore.
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Job Description:

Staff Layout Engineer ( Station in Singapore )

Job descriptions and the level of expertise:

The descriptions are for layout engineers for our Library Group. Library Group is a part of Central Engineering Group. 

In Library Group, we focus on circuit design for memory, I/O (Input/Output), and Standard Cells. 

Requirements:

IC Layout

Strong layout knowledge with a minimum of 8 years of experience

Skills include Cadence layout, Cadence schematic capture, using CALIBRE & Hercules verification tools. 

Strong layout knowledge in submicron processes, e.g. 16nm, 7nm, 5nm,2nm ,A14 and below

Experienced in digital (standard cell, memory, I/O) layout

Experienced in analog layout is also a plus


Job description:

IC Layout

Responsible to understand and apply all necessary layout guidelines (standard cells, I/O memories), new process rules and other technical requirements for quality layout
Schedule time-line & layout floor-planning

Complete quality layout and verification within planned schedule (without supervision for experienced engineer)

Get up to speed quickly for new methodologies, open to new ideas and communicate well with others in the library team

Skill Set (Mem)

  • Strong experience in memory layout design and physical verifications, including LVS, DRC, ERC, Antenna, and Electro Migration in CMOS processes.

  • Experienced in Cadence Layout tools VIRTUOSO (XL,VXL or EXL), and CALIBRE verification tools.

  • Good experience in Floor-planning, hierarchy layout and chip integration.

  • Experience in memory compiler will be a plus.

  • Knowledge of Script Programming and SKILL Programming would be a plus.

  • Able  to lead  or train a team of junior engineers

  • Good knowledge of memory layout topology.

  • Ability to lead new technology reviews to compile documentation of layout methodology, layout flow and guidelines.

  • Self-reliant, with the ability to work independently as well as in a team.

  • Good leadership quality in project management.

Re-location

  • Must be available to re-locate to Singapore immediately.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • Minimum 8 years of IC layout experience
  • Strong experience with Cadence Virtuoso (XL, VXL, or EXL)
  • Cadence schematic capture experience
  • Experience with Calibre and Hercules verification tools
  • Experience with LVS, DRC, ERC, Antenna and Electromigration verification
  • Strong layout knowledge in submicron processes (16nm, 7nm, 5nm, 2nm, A14 and below)
  • Experience in digital layout (standard cell, memory, I/O)
  • Analog layout experience
  • Floor-planning, hierarchy layout and chip integration experience
  • Experience with memory compiler
  • Knowledge of SKILL scripting/programming
  • Good knowledge of memory layout topology
  • Ability to lead or train a team of junior engineers
  • Ability to lead new technology reviews and document layout methodology and flow
  • Self-reliant and able to work independently and in a team
  • Good leadership and project management skills
  • Must be available to relocate to Singapore immediately

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
  • Retirement Support A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
  • Pay Growth & Progression Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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