Job Description
Propose, architect, and design RTL in Verilog for use in a mixed-signal integrated circuit
Contribute as part of a highly experienced team of engineers with extensive cross-functional skill set
Apply clocking controls, FSM design, low power techniques, and high-speed design concepts
- Participate in design, architecture, and verification reviews
- Oversee digital backend design, including synthesis, static timing analysis, and logic equivalence checking
- Create documentation targeting design, verification, and test teams
- Assist with the proposal, definition, documentation, and implementation of new features
- Mentor and train junior engineers and New College Grad engineers
Qualifications
- Education: Bachelor or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with minimum 12+ years of experience
- 8+ years of direct experience in ASIC/IC design with deep knowledge of the entire IC design flow
- Experience in architecting digital designs and writing device-level or sub-system specifications.
- Fluent in Verilog RTL coding and ASIC design methodology
- Expertise in digital design implementation, including logical synthesis and DFT insertion with high coverage
- Experience with static timing analysis and creation of place and route constraints
- Proficiency in formal verification, linting, and CDC/RDC checking
- Knowledge of asynchronous clock crossings and synthesis implications of RTL
- Experience implementing and verifying ECOs on RTL, synthesized, and post-route netlists
- Competence in developing design constraints for synthesis, STA, and P&R hand-off
- Experience with gate-level simulations and understanding the causes and implications of timing violations
- Familiarity with ATPG generation and ATE support (a plus)
- Experience in DFT or physical design (a plus)
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.
Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.
Skills Required
- Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
- Minimum 12+ years of professional experience
- 8+ years of direct ASIC or IC design experience
- Deep knowledge of the complete IC design flow
- Experience architecting digital designs and writing device-level or subsystem specifications
- Fluency in Verilog RTL coding and ASIC design methodology
- Expertise in logical synthesis and DFT insertion with high coverage
- Experience with static timing analysis and place-and-route constraints
- Proficiency in formal verification, linting, and CDC/RDC checking
- Knowledge of asynchronous clock crossings and RTL synthesis implications
- Experience implementing and verifying ECOs on RTL, synthesized, and post-route netlists
- Competence developing constraints for synthesis, STA, and place-and-route handoff
- Experience with gate-level simulations and timing violation analysis
- Familiarity with ATPG generation and ATE support
- Experience in DFT or physical design
Renesas Electronics Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Renesas Electronics and has not been reviewed or approved by Renesas Electronics.
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Fair & Transparent Compensation — Feedback suggests pay is generally fair-to-good across many roles, with base pay aligned to prevailing market levels in multiple U.S. locations. Engineering and leadership tracks can be competitive on total compensation, reinforcing a sense that pay can meet market expectations in key job families.
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Healthcare Strength — Feedback suggests core medical, dental, and vision coverage is solid and well-regarded by employees. Day-one eligibility in U.S. roles is described, supporting confidence in access and continuity of care.
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Leave & Time Off Breadth — Feedback suggests PTO, paid holidays, sick time, and parental leave provide a comprehensive time-off framework. Company initiatives like Renesas Day and meeting-light Focus Fridays further support time away and balance.
Renesas Electronics Insights
What We Do
We're the world's leading semiconductor manufacturer. Our mission is to make our lives easier and a world that's safer, healthier, greener, and smarter.
