1. Role Overview & Objective
- We are looking for a motivated SRAM Circuit Design Engineer to join our semiconductor engineering team developing circuits and SRAM/Register File for low power, low voltage and high performance.
- This role is ideal for candidates who are passionate about memory design, characterization methodologies, and physical verification, and who are eager to build a strong foundation in VLSI memory development.
2. Key Responsibilities
- Circuit Design & Optimization: Build full-custom or compiler-based SRAM macros, sense amplifiers, and self-timed circuits.
- Simulation & Characterization: Run SPICE simulations to analyze timing, power, and Static Noise Margin (SNM) across process corners.
- Layout Supervision: Direct physical design and layout teams to handle process variability and FinFET manufacturing rules.
- Silicon Validation & Debug: Support post-silicon testing and troubleshooting hardware failures
3. Required Qualifications & Experience
- Education: B.Tech/M.Tech in Electrical Engineering, VLSI, or Microelectronics.
- Experience: Typically ranges from 6 to 18 years depending on whether the role is entry/mid-level or a senior lead/architect position.
- Core Knowledge: Deep understanding of CMOS device physics, transistor sizing, and memory cell stability.
- Tools: Proficiency in EDA software like Cadence Virtuoso or SPICE simulators.
- Scripting: Ability to use Python or Perl for workflow automation and data analysis
4. Behavioral & Soft Skills
- Strong analytical and problem-solving skills.
- High attention to detail.
- Ability to collaborate cross-functionally with circuit designers, architecture teams, and CAD engineers.
Skills Required
- B.Tech or M.Tech in Electrical Engineering, VLSI, or Microelectronics
- 6 to 18 years of relevant semiconductor/VLSI design experience
- Deep understanding of CMOS device physics, transistor sizing, and memory cell stability
- Experience designing SRAM macros, sense amplifiers, and self-timed circuits
- Proficiency with EDA tools (Cadence Virtuoso) and SPICE simulators
- Scripting experience using Python or Perl for workflow automation and data analysis
- Knowledge of FinFET manufacturing rules and handling process variability
- Experience with silicon validation, post-silicon testing, and hardware debug
- Strong analytical skills, attention to detail, and cross-functional collaboration ability
Cadence Design Systems Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.
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Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
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Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
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Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.
Cadence Design Systems Insights
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.






