Software Engineer II

Posted Yesterday
Be an Early Applicant
San Jose, CA, USA
In-Office
105K-195K Annually
Entry level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
Develop algorithms and high-performance C/C++ software for advanced power routing and power optimization within Cadence’s Innovus digital implementation platform. Responsibilities include debugging, performance optimization, quality improvement, and collaborating with cross-functional R&D teams to deliver production-ready semiconductor design features.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

About the Role

Cadence Design Systems is looking for a highly motivated Software Engineer II to join the Innovus R&D team. 

Innovus is Cadence’s flagship digital implementation platform, enabling customers to design advanced semiconductor chips from RTL to GDSII.

In this role, you will contribute to the development of advanced power routing technologies for digital physical design, 

with an emphasis on power/ground routing, power network planning and creation, and power delivery optimization.

You will work closely with experienced R&D engineers to develop algorithms and software solutions for challenging routing problems in advanced semiconductor designs.


Key Responsibilities

  • Design and implement algorithms for advanced power routing and power optimization
  • Develop high-performance and scalable software using C/C++ on Linux/UNIX platforms
  • Debug, troubleshoot, and enhance existing features within the Innovus platform
  • Analyze performance bottleneck and improve quality of results, runtime, and robustness
  • Collaborate with cross-functional teams to define requirements, validate solutions, and deliver production-quality features

Minimum Qualifications

  • MS in Computer Science, Electrical Engineering, Computer Engineering, or a related field
  • Strong programming skills in C/C++
  • Strong foundation in algorithms, data structures, and problem-solving
  • Good understanding of software development and debugging in Linux/UNIX environments
  • Strong analytical and debugging skills
  • Ability to work effectively in a collaborative, team-oriented environment

Preferred Qualifications

  • Coursework, research, internship, or project experience in VLSI CAD, physical design, algorithms, computational geometry, or optimization
  • Basic knowledge of digital IC design or physical design concepts
  • Experience with algorithm development or large-scale software development
  • Familiarity with scripting languages such as Tcl, Python, or Perl
  • Exposure to EDA tools or place-and-route flows is a plus, but not required

The annual salary range for California is $105,000 to $195,000. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • MS degree in Computer Science, Electrical Engineering, Computer Engineering, or a related field
  • Strong programming skills in C/C++
  • Strong foundation in algorithms, data structures, and problem-solving
  • Experience with software development and debugging in Linux/UNIX environments
  • Strong analytical and debugging skills
  • Ability to work effectively in a collaborative, team-oriented environment
  • Coursework, research, internship, or project experience in VLSI CAD, physical design, algorithms, computational geometry, or optimization
  • Basic knowledge of digital IC design or physical design concepts
  • Experience with algorithm development or large-scale software development
  • Familiarity with Tcl, Python, or Perl
  • Exposure to EDA tools or place-and-route flows

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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