Cadence Design Systems Inc. is looking for a motivated Software Engineer II: Hardware Verification Compiler to work with us in Belo Horizonte, Brazil.
At Cadence, we hire and develop leaders and innovators who want to impact the world of technology. Cadence has been nominated as a Great Place to Work globally and in Brazil and is also a Fortune 100 Best Companies to Work For.
As a Software Engineer II: Hardware Verification Compiler, you will be part of the Palladium Compiler Development team, contributing to Cadence's Palladium Platform in Belo Horizonte, Brazil. The team develops compiler technology for Palladium, a highly scalable emulation system used to verify advanced electronic designs. You will help develop high-performance compiler capabilities for large-scale model checking and structural checking, with opportunities to apply multithreading and distributed computing. Working at Cadence is dynamic, fast paced, and integrated with other teams all around the world.
Job Description:
- Contribute to the development of compiler technology for the Cadence Palladium Platform.
- Design and implement scalable software solutions for large compile workloads, including model checking and structural checking.
- Apply creativity and strong problem-solving skills to improve compiler functionality, scalability, and performance.
- Learn and apply multithreading and distributed-computing techniques to solve large-scale compilation problems.
- Develop, debug, test, and maintain production-quality C/C++ software in a Linux/Unix environment.
- Collaborate with local and global engineering teams on design, implementation, validation, and issue resolution.
Requirements:
- Complete Bachelor's degree or MS in engineering, computer science or related field.
- Professional experience and strong understanding of data structures, algorithms and databases.
- Demonstrated proficiency in C++, gdb debugging, and general software development skills
- Familiarity with Linux/Unix development.
- Exposure to build and version-control systems.
- Coursework in Hardware Descript Language, such as Verilog, SystemVerilog, VHDL.
- Exposure to electronic design platforms.
- Great communication in English and Portuguese.
Additional Job Details:
- Employment category: CLT
- Employment term: 40 hours/week.
- Competitive benefits.
- Location: Av Contorno 5800, Belo Horizonte, Minas Gerais Brazil.
About Cadence Design Systems:
Cadence is the only company that provides the expertise and tools, IP, and hardware required for the entire electronics design chain, from chip design to chip packaging to boards and to systems. We enable electronic systems and semiconductor companies to create innovative products that transform the way people live, work, and play. Our products are used in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. For more information, access http://www.cadence.com.
The Cadence Palladium Platform is world most scalable emulation system that verifies most of the latest design innovations in electronics worldwide. We are looking for a talented engineer to join our team and contribute to the world’s fastest emulator compiler development. You’ll have a great opportunity to make a difference by applying your creativity and problem-solving skills, learn and/or apply multi-threading/distributed computing to solve large scale compile problems such model checking and structural checking to ensure functionality.
We’re doing work that matters. Help us solve what others can’t.
Skills Required
- Completed Bachelor's degree or Master's degree in engineering, computer science, or a related field
- Professional experience with strong understanding of data structures, algorithms, and databases
- Proficiency in C++
- Proficiency with gdb debugging
- General software development skills
- Familiarity with Linux/Unix development
- Exposure to build and version-control systems
- Coursework in a hardware description language such as Verilog, SystemVerilog, or VHDL
- Exposure to electronic design platforms
- Strong communication skills in English and Portuguese
Cadence Design Systems Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.
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Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
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Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
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Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.
Cadence Design Systems Insights
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
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