SoC Verification Engineer

Posted One Month Ago
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Bangalore, Bengaluru Urban, Karnataka, IND
In-Office
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Creating world-changing technology that enriches the lives of every person on earth.
The Role
Design and execute scalable UVM/OVM verification plans and testbenches for SoC blocks and subsystems. Develop and run emulation and system simulations, debug presilicon issues, collaborate with architects/RTL/postsilicon teams, integrate security coverage, and maintain verification infrastructure and methodologies.
Summary Generated by Built In
Job Details:

Job Description: About the Team:

You will be joining Intel's cutting-edge product development group, a team focused on designing and verifying advanced semiconductor solutions. This group is at the forefront of innovation, delivering high-quality, scalable products that drive Intel's leadership in technology and performance. By contributing your skills here, you will help shape the future of computing and enable groundbreaking advancements in the industry.

Position Overview:

As a SoC Design Verification Engineer, you will play a pivotal role in ensuring that Intel's complex System-on-Chip (SoC) designs meet functional specifications and deliver high-quality performance. You will design scalable and reusable verification plans, develop test environments, and execute tests to uncover issues and improve functionality. Your contributions will directly enhance Intel's product quality and ensure optimal performance in presilicon development.

Key Responsibilities:
  • Create and update UVM-based test bench generation and test case creation

  • Define and develop scalable and reusable block, subsystem, and SoC verification plans

  • Create test benches and verification environments that align with microarchitecture specifications

  • Execute verification plans, including emulation and system simulation models, to ensure design functionality and uncover bugs

  • Debug and root cause issues in presilicon environments, implementing corrective measures to address failures

  • Collaborate with architects, RTL developers, postsilicon teams, and physical design teams to improve verification of complex architectural features

  • Document and maintain test plans, driving technical reviews with design and architecture teams

  • Integrate security coverage activities within test plans, including regression and debug tests

  • Maintain and improve existing functional verification infrastructure and methodologies

  • Absorb learnings from postsilicon development and incorporate feedback into improved verification strategies.

To Be Successful, You Should Demonstrate the Following:
  • Ability to work collaboratively across interdisciplinary teams

  • Strong communication skills with the ability to work across interdisciplinary teams

  • Passion for tackling complex problems and delivering innovative solutions

Qualifications:

Minimum Qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 7+ years of hands-on experience in SoC design verification, including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning

    OR

  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, with 6+ years of hands-on experience in SoC design verification, including demonstrated expertise in OVM/UVM methodologies, debugging, and test planning.

The experience must include:

  • AMBA protocols such as CHI, AXI, AHB, and APB with industry-standard VIP from various EDA vendors

  • Creation and updating of UVM-based test benches and test case creation

Preferred Qualifications:

  • Experience with postsilicon validation and incorporating feedback into presilicon test plans

  • Familiarity with emulation models and system simulation tools for performance analysis

We invite you to bring your expertise and creativity to Intel, where your contributions will make a lasting impact on future technology. Join us and shape the future of computing with your skills and dedication.

          

Job Type:Experienced Hire

Shift:Shift 1 (India)

Primary Location: India, Bangalore

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Skills Required

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 7+ years hands-on SoC design verification experience
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 6+ years hands-on SoC design verification experience
  • Demonstrated expertise in OVM/UVM methodologies, debugging, and test planning
  • Experience with AMBA protocols: CHI, AXI, AHB, and APB using industry-standard VIP from EDA vendors
  • Creation and updating of UVM-based test benches and test case creation
  • Ability to collaborate across interdisciplinary teams and strong communication skills
  • Experience integrating security coverage activities within test plans, including regression and debug tests
  • Familiarity with emulation models and system simulation tools for performance analysis
  • Experience with postsilicon validation and incorporating feedback into presilicon test plans

Intel Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.

  • Leave & Time Off Breadth — Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
  • Parental & Family Support — Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
  • Healthcare Strength — Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.

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HQ: Santa Clara, CA
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Year Founded: 1968

What We Do

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