Design Verification Engineer II

Reposted 4 Days Ago
Be an Early Applicant
Bengaluru, Bengaluru Urban, Karnataka, IND
In-Office
Mid level
Software • Quantum Computing • Metaverse • Infrastructure as a Service (IaaS)
The Role
Design verification engineer responsible for pre- and post-silicon/IP/SoC verification using SV-UVM/C, developing tests and testbenches, FPGA validation, firmware bring-up, cross-functional collaboration, debugging, and improving validation methodologies and tools to ensure silicon quality and manufacturability.
Summary Generated by Built In
Overview

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide, and we are looking for passionate engineers to help achieve that mission. 

The Compute Silicon & Manufacturing Engineering (CSME) organization within SCHIE is responsible for design, development, manufacturing and packaging of Microsoft's state-of-the-art computer chips, notably the Azure Cobalt. Our solutions provide sustainable strategic advantages to Microsoft and enable our customers to achieve more. 

As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time,in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the shared  custom IP and silicon security (SCIPS) team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for  engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure. 

  


Responsibilities

As a Design Verification Engineer on the SCIPS (Semi-custom and Central IP Silicon) team, you will be expected and able to complete the following responsibilities: 

  • Verify/validate silicon or IP to address complex challenges. 

  • Take the lead in functional verification of advanced IP or ASIC SOC components using a UVM/C test bench. 

  • Conduct Pre-Silicon IP/SoC verification and Post-Silicon/FPGA validation by establishing effective testing strategies. 

  • Collaborate with cross-functional teams—including Architecture, Design, Verification, and Partner groups—for project delivery, while also helping shape future designs. 

  • Create test plans, develop tests and support infrastructure to fully validate intricate designs, and document bugs or issues. 

  • Execute tests, troubleshoot failures, and devise stress and performance scenarios to achieve test plan objectives. 

  • Engage in chip bring-up activities and write test firmware to assist other teams. 

  • Drive innovation by enhancing validation efficiency through new methodologies and tools. 

  • Embody Microsoft’s core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive Results, Influence for Impact, Judgement, and Diversity & Inclusion. 


Qualifications

Required Qualifications: 

  • 3+ years of related technical engineering experience 

  • OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience 

  • OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience or internship experience 

  • OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. 

  • Experience in executing pre-silicon verification of IPs/Sub Systems/SoCs through full cycle. 

  • Background in creating and debugging IP/SoC Level tests in SV-UVM/C. 

  • In depth knowledge of verification principles, testbenches and stimulus generation. 

  • Solid understanding of silicon chip and/or computer architecture 

  • Scripting language such as Python, Ruby or Perl. 

Preferred Qualifications: 

  • Experience with the use of formal verification methods 

  • Experience in Assembly, start up code and linker scripts 

  • Experience in developing Makefiles for software development. 

 

Screening Requirements 

  • The ability to meet Microsoft, customer, and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.  

  • This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations.  As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. 
     
     


This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.



Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

Skills Required

  • 3+ years of related technical engineering experience
  • Experience executing pre-silicon verification of IPs/SubSystems/SoCs through full cycle
  • Creating and debugging IP/SoC level tests in SystemVerilog UVM and C
  • In-depth knowledge of verification principles, testbenches, and stimulus generation
  • Solid understanding of silicon chip and/or computer architecture
  • Experience with scripting languages such as Python, Ruby, or Perl
  • Ability to meet Microsoft, customer, and/or government security screening requirements (Microsoft Cloud Background Check)
  • Provide proof of citizenship or US residency for export-control eligibility assessment
  • Experience with formal verification methods
  • Experience in Assembly, startup code and linker scripts
  • Experience developing Makefiles for software development

Microsoft Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Microsoft and has not been reviewed or approved by Microsoft.

  • Fair & Transparent Compensation — Pay is presented as broadly competitive overall, with clear role/level/location variation and an emphasis on using posted ranges and band information for apples-to-apples comparisons.
  • Retirement Support — Retirement benefits are described as a standout, highlighted by a strong 401(k) match structure and immediate vesting, plus additional plan features for tax-advantaged saving.
  • Parental & Family Support — Family-oriented benefits are portrayed as a meaningful strength, with substantial paid parental leave and added supports like back-up care and adoption/surrogacy assistance.

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The Company
HQ: Redmond, WA
206,870 Employees
Year Founded: 1975

What We Do

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