Senior Staff Signal and Power Integrity Engineer

Posted Yesterday
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Pune, Maharashtra, IND
In-Office
Senior level
Semiconductor • Manufacturing
The Role
Perform pre- and post-layout signal and power integrity simulations, including IR drop, impedance, EMC, crosstalk, jitter, and eye-diagram analysis. Develop modeling methodologies, package and system integration guidelines, and design recommendations for advanced packaging. Use simulation and lab data to troubleshoot failures, determine root causes, optimize package and SI designs, and collaborate with package design and testing teams.
Summary Generated by Built In
Lattice Overview

There is energy here…energy you can feel crackling at any of our international locations. It’s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.

Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a “team first” organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you’re looking for.

Job Description:

Lattice is seeking candidates for the position of Senior Staff Signal and Power Integrity Engineer. This is a full-time position located in India.

Accountabilities: 

  • Perform pre-layout and post-layout simulation flow.
  • Performing DC IR drop and AC impedance simulation.
  • Execute SI/PI/EMC design-optimization for chip/package/system integration and electrical performance optimization, e.g., eye diagram, jitter, IR/EM, system-PI, cross-talk, and SSN/SSO.
  • Develop system integration design guidelines with SI/PI total solution for advanced packaging technologies (FC/InFO etc).
  • Create simulation models and develop simulation methodology for SI/PI design.
  • Use simulation and lab data to support design troubleshooting and propose   corrective actions, drive failure analysis, root cause efforts, and design of experiments to resolve problems.
  • Explore various design elements including different modules, memories, low/high speed buses, components, their physics of operation, and impacts on system performance.
  • Work closely with package design team and testing team to optimize Package and/or SI design based on the simulation data.
  • Generate simulation report based on the data with clear Package & SI recommendations.

Qualifications:

  • Must have an MS or PhD in Electrical Engineering.
  • Qualified candidate must have 10 years or above of recent Signal Integrity experience
  • Proved experiences on package level signal and power integrity.
  • Package-level system architecture, I/O structures & topologies
  • Experience with signal integrity modeling tools, including 3D EM modeling (Ansys HFSS) and simulation (Agilent ADS or similar) software
  • Experience with signal and power integrity analysis tools (ex: HSPICE, Sigrity tools, PowerDC etc)
  • Communication skills are a must as this person will interact with engineers in different disciplines as well as with members of management.

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

India

Lattice recognizes that employees are its greatest asset and the driving force behind success in a highly competitive, global industry.  Lattice continually strives to provide a comprehensive compensation and benefits program to attract, retain, motivate, reward and celebrate the highest caliber employees in the industry. 


Lattice is an international, service-driven developer of innovative low cost, low power programmable design solutions.  Our global workforce, some 1,000 strong, shares a total commitment to customer success and an unbending will to win.  For more information about how our FPGA, CPLD and programmable power management  devices help our customers unlock their innovation, visit 
www.latticesemi.com.  You can also follow us via Twitter, Facebook, or RSS. At Lattice, we value the diversity of individuals, ideas, perspectives, insights and values, and what they bring to the workplace.  Applications are welcome from all qualified candidates.

 

Skills Required

  • MS or PhD in Electrical Engineering
  • 10 or more years of recent signal integrity experience
  • Proven experience with package-level signal and power integrity
  • Experience with package-level system architecture, I/O structures, and topologies
  • Experience with signal integrity modeling tools, including 3D EM modeling using Ansys HFSS
  • Experience with Agilent ADS or similar simulation software
  • Experience with signal and power integrity analysis tools such as HSPICE, Sigrity, and PowerDC
  • Strong communication skills for cross-disciplinary and management interaction
  • Successful background and reference checks
  • Proof of the right to work in India
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The Company
HQ: Hillsboro, OR
975 Employees
Year Founded: 1983

What We Do

Lattice Semiconductor (NASDAQ: LSCC) is the low power programmable leader. We solve customer problems across the network, from the Edge to the Cloud, in the growing communications, computing, industrial, automotive and consumer markets. Our technology, long-standing relationships, and commitment to world-class support lets our customers quickly and easily unleash their innovation to create a smart, secure and connected world. Lattice was founded in 1983 and is headquartered in Hillsboro, Oregon with major operations in San Jose, California, Shanghai, China, and Manila, Philippines.

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