The GaN Technology Development Group is seeking a Senior Staff Device Design and Integration Engineer for development and integration of next-generation technology platforms. This role will work across device design, process integration, product, test, reliability, and manufacturing teams to deliver technologies from concept through qualification and production.
Key Responsibilities
Device architecture, design, and integration for next-generation technology platforms, balancing performance, cost, manufacturability, and reliability.
Define device and product requirements with product, applications, process integration, test, reliability, and manufacturing teams.
Drive chip design and layout, including active-cell, termination, metal interconnect, pad, and floorplan optimization.
Plan and support engineering and qualification lots, including characterization, DOE, reliability, and qualification activities.
Analyze electrical, yield, reliability, and qualification data and drive design or process improvements.
Lead root-cause analysis and corrective actions for performance, yield, quality, and reliability issues.
Provide technical leadership, communicate risks and decisions, and mentor engineers across cross-functional teams.
PhD with 5+ years or MS with 8+ years of semiconductor device or product development experience in Electrical Engineering, Applied Physics, Materials Science, or a related field.
Strong knowledge of power-semiconductor device physics, chip layout, electrical characterization, and technology integration.
Experience taking semiconductor technologies or products from definition through engineering lots, qualification, and manufacturing release.
Experience analyzing characterization, yield, and reliability data using JMP, Python, MATLAB, or equivalent tools.
Strong cross-functional collaboration, technical leadership, problem-solving, and communication skills.
Preferred Qualifications
Experience with GaN and/or silicon power devices, high-voltage design, termination, and interconnect optimization.
Knowledge of TCAD or compact modeling, DOE methods, process integration, and failure analysis.
Experience with JEDEC qualification and familiarity with AEC-Q101 requirements.
The expected annual pay range for this position is $145,000 - $181,000. This position is also eligible for bonus opportunities. Please note that final offer amount will be dependent on geographic location, applicable experience, and skillset of the candidate.
Renesas offers a full range of elective benefits including medical, health savings account (with applicable medical plan), dental, vision, health and/or dependent care flexible spending accounts, pre-tax commuter benefits, life insurance, AD&D, and pet insurance. In addition to elective benefit options, benefited employees receive company-paid life insurance and AD&D, LTD, short term medical benefits as well as paid sick time, paid holidays, and accrued paid vacation. New employees will attend a detailed benefit orientation to learn more about our many benefits and resources.
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.
Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.
Skills Required
- PhD with at least 5 years of semiconductor device or product development experience
- Master’s degree with at least 8 years of semiconductor device or product development experience
- Degree in Electrical Engineering, Applied Physics, Materials Science, or a related field
- Knowledge of power-semiconductor device physics, chip layout, electrical characterization, and technology integration
- Experience taking semiconductor technologies or products from definition through engineering lots, qualification, and manufacturing release
- Experience analyzing characterization, yield, and reliability data using JMP, Python, MATLAB, or equivalent tools
- Strong cross-functional collaboration, technical leadership, problem-solving, and communication skills
- Experience with GaN or silicon power devices, high-voltage design, termination, and interconnect optimization
- Knowledge of TCAD or compact modeling, DOE methods, process integration, and failure analysis
- Experience with JEDEC qualification and familiarity with AEC-Q101 requirements
Renesas Electronics Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Renesas Electronics and has not been reviewed or approved by Renesas Electronics.
-
Fair & Transparent Compensation — Feedback suggests pay is generally fair-to-good across many roles, with base pay aligned to prevailing market levels in multiple U.S. locations. Engineering and leadership tracks can be competitive on total compensation, reinforcing a sense that pay can meet market expectations in key job families.
-
Healthcare Strength — Feedback suggests core medical, dental, and vision coverage is solid and well-regarded by employees. Day-one eligibility in U.S. roles is described, supporting confidence in access and continuity of care.
-
Leave & Time Off Breadth — Feedback suggests PTO, paid holidays, sick time, and parental leave provide a comprehensive time-off framework. Company initiatives like Renesas Day and meeting-light Focus Fridays further support time away and balance.
Renesas Electronics Insights
What We Do
We're the world's leading semiconductor manufacturer. Our mission is to make our lives easier and a world that's safer, healthier, greener, and smarter.






