Senior SI/PI Engineer, India (Hyderabad/Bangalore) or Taiwan

Posted 8 Days Ago
Be an Early Applicant
3 Locations
Remote or Hybrid
Senior level
Artificial Intelligence • Hardware • Semiconductor
The Role
Lead signal and power integrity analysis and simulation for semiconductor packages, PCBs, channels, connectors, and high-speed interconnects. Develop SI/PI solutions, collaborate with circuit, technology, product, customer, and supplier teams, and resolve system-level design challenges. Evaluate DDR5, PCIe, PAM, and Chord signaling architectures; perform EM modeling, channel extraction, lab validation, and technical communication. The role requires extensive semiconductor industry experience and expertise with Cadence SI/PI tools, Linux-based environments, and scripting.
Summary Generated by Built In

At Kandou, we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.

Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.

Kandou’s architecture is not just an incremental improvement — it’s a foundational shift in how AI hardware is built for the future.

Senior SI/PI Engineer either based in Hyderabad, Bangalore or Taiwan.

 

We are looking for a Senior SI/PI Engineer with strong hands-on experience in signal integrity and power integrity for semiconductor, package, PCB, and high-speed interconnect applications. The ideal candidate will have deep expertise in electromagnetics, system-level design, material interactions across package, PCB, connector, and cable domains, and the ability to solve complex high-speed design challenges in real-world systems.

 

Key Responsibilities

  • Perform and lead theoretical and simulation-based SI analysis of PCB products, channels, test structures, and system implementations.

  • Drive Signal and power delivery solutions for PCB and Package and evaluation platforms in collaboration with design teams.

  • Work closely with circuit designers to ensure robust SI/PI implementation in silicon.

  • Partner with technology and product teams to guide SI/PI architecture and resolve system-level challenges.

  • Engage with customers and suppliers to define and validate hardware solutions including packages, PCB/backplane layouts, materials, interposers, and connectors.

  • Prepare and communicate technical analyses and recommendations to internal teams and external stakeholders.

  • Evaluate and benchmark signaling schemes such as Chord signaling and PAM in terms of SI/PI performance, power, and implementation trade-offs.

 

Required Experience

  • 12+ years of experience in the semiconductor industry, with a focus on signal and power integrity.

  • Strong foundation in electromagnetics and system-level design, including material behavior across package, PCB, board, connector, and cable, as well as analog, power, and digital electronics.

  • Proven experience solving significant SI problems through innovative connector, package, or cable design.

  • Hands-on problem-solving ability with the capability to quickly grasp new concepts and translate them into practical solutions.

  • Strong cross-functional communication skills and a collaborative working style.

  • Experience with high-speed interfaces including DDR5 and PCIe.

  • Experience with Cadence board layout environments and SI/PI tools.

 

Technical Skills

  • Deep understanding of SI/PI design and simulation across abstraction levels, from EM modeling to system-level link behavior.

  • Expertise with EM/SI/PI tools and modeling flows, including calibration, correlation, and validation.

  • Familiarity with lab measurements using VNA, spectrum analyzers, and high-speed oscilloscopes.

  • Strong intuition for EM simulation trade-offs, including accuracy, runtime, model complexity, and design impact.

  • Experience with channel modeling and extraction for multi-Gbps systems, including end-to-end link considerations.

  • Proficiency in Linux-based design environments and scripting for modeling and automation.

  • Solid understanding of signaling schemes and link architectures, including performance, complexity, and power trade-offs.

 

Preferred Qualifications

  • Experience with DDR5 interface analysis, routing considerations, and channel optimization.

  • Experience with PCIe channel design, equalization, and validation.

  • Hands-on experience with Cadence Allegro, Sigrity, Clarity 3D, and related toolset.

  • Exposure to advanced PCB Layout techniques for large server-based systems

  • Strong documentation and presentation skills for technical reviews and customer communication.

 

Education

  • Required: Master’s degree in Physics, Electronics, Electrical Engineering, or equivalent.

  • Desired: PhD in electromagnetics-related areas such as Physics, Electrical Engineering, or Electronics Engineering.

 

If this is the role you have been looking for and you want to be part of a growing Company, with an exciting future then we would really love to hear from you. Together We Kandou It!

 

www.kandou.ai

 

Skills Required

  • 12 or more years of semiconductor industry experience focused on signal integrity and power integrity
  • Master’s degree in Physics, Electronics, Electrical Engineering, or equivalent
  • Strong foundation in electromagnetics and system-level design
  • Experience with material behavior across packages, PCBs, boards, connectors, and cables
  • Experience with analog, power, and digital electronics
  • Experience solving SI problems through connector, package, or cable design
  • Experience with high-speed DDR5 and PCIe interfaces
  • Experience with Cadence board layout environments and SI/PI tools
  • Understanding of SI/PI design and simulation from EM modeling through system-level link behavior
  • Experience with EM/SI/PI tools, modeling flows, calibration, correlation, and validation
  • Laboratory measurement experience using VNAs, spectrum analyzers, and high-speed oscilloscopes
  • Experience with channel modeling and extraction for multi-gigabit-per-second systems
  • Proficiency in Linux-based design environments and scripting for modeling and automation
  • Understanding of signaling schemes and link architecture trade-offs
  • Strong cross-functional communication and collaborative problem-solving skills
  • Experience with DDR5 routing analysis and channel optimization
  • Experience with PCIe channel design, equalization, and validation
  • Hands-on experience with Cadence Allegro, Sigrity, and Clarity 3D
  • Experience with advanced PCB layout for large server systems
  • PhD in electromagnetics, Physics, Electrical Engineering, or Electronics Engineering
  • Strong documentation, presentation, and customer communication skills
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The Company
222 Employees

What We Do

Kandou AI is a fabless semiconductor company developing high-speed connectivity for AI infrastructure. Its patented Copper MIMO, also known as Chord Signaling, sends correlated signals at data-processing speeds of 448 Gbps and beyond, providing an alternative to optical interconnects. The company’s technology targets AI data-movement bottlenecks and memory-wall constraints, while its platforms emphasize improved efficiency, lower power and cost, and scalability.

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