Senior RTL Design Engineer

Posted 26 Days Ago
Be an Early Applicant
2 Locations
In-Office
120K-200K Annually
Senior level
Artificial Intelligence • Hardware • Machine Learning • Natural Language Processing • Software • Generative AI
SambaNova is the #1 platform for business AI.
The Role
Design and implement RTL components for AI accelerator ASICs from microarchitecture through tape-out and silicon bring-up. Responsibilities include writing and debugging SystemVerilog, optimizing power, performance, and area, supporting synthesis and timing closure, and applying lint, CDC, LEC, and assertion-based quality checks. The engineer collaborates with architecture, verification, and physical design teams while contributing to compute datapath, on-chip network, and memory subsystems.
Summary Generated by Built In

SambaNova is a leader in next-generation AI infrastructure, delivering a full-stack inference platform for customers worldwide. At the core of SambaNova's technology is the RDU (Reconfigurable Dataflow Unit) — a chip built on a dataflow architecture rather than the traditional GPU model. Its decode performance is especially strong for agentic workloads like multi-turn agents, code generation, and long-running applications. RDUs are packaged into SambaRack, rack-scale hardware that lets customers deploy state-of-the-art models with better performance, greater energy efficiency, and faster time to value.

About the team About the role

The RTL design team builds the compute datapath, on-chip network, and memory subsystems inside SambaNova's RDU AI accelerator. Their work spans microarchitecture through tape-out: RTL implementation, PPA trade-offs, quality gates like lint, CDC, and LEC, and timing closure with 

About the role

SambaNova RTL Design Engineers design component units of the Reconfigurable Dataflow Unit (RDU) ASICs behind our AI acceleration systems. You'll own blocks within a larger subsystem, contributing sections of the microarchitecture specification, writing and debugging the RTL, and carrying your blocks through implementation, tape-out, and silicon bring-up. You'll work alongside principal engineers, architects, design verification, and physical design, and take on larger blocks as you build depth in our architecture

Required Qualifications
  • B.S. in Electrical Engineering, Computer Engineering, or Computer Science
  • 5+ years of experience in ASIC RTL design
  • Solid foundation in computer architecture and digital logic design
  • Strong SystemVerilog RTL design skills for high-speed, high-performance ASICs
  • Experience making design decisions that trade off power, performance, and area
  • Knowledge of industry-standard interconnects and protocols including AXI, PCIe, Ethernet, and HBM or DDR
  • Experience with digital logic synthesis tools and static timing analysis
  • Proficiency with industry-standard tools for linting, clock domain crossing, and logical equivalence checking
  • Experience implementing SystemVerilog Assertions to check design intent
  • Familiarity with tools and simulators for hardware performance analysis and tuning
  • Familiarity with Git for managing release cycles
  • Scripting skills in Python and Linux shell
Preferred Qualifications
  • M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science
  • Exposure to a full ASIC development cycle through tape-out and production silicon
  • Interest in or knowledge of AI workload acceleration techniques
  • Experience with low-power design techniques such as clock gating and DVFS at advanced process nodes
  • Exposure to emulation or FPGA prototyping platforms for pre-silicon validation

Base Salary Range:

Base Pay Range
$120,000$200,000 USD

Submission Guidelines
Please note that in order to be considered an applicant for any position at SambaNova Systems, you must submit an application form for each position for which you believe you are qualified. 

EEO Policy
SambaNova Systems is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard basis of age (40 and over), color, disability, gender identity, genetic information, marital status, military or veteran status, national origin/ancestry, race, religion, creed, sex (including pregnancy, childbirth, breastfeeding), sexual orientation, and any other applicable status protected by federal, state, or local laws.

Benefits Summary for US-Based, Full-Time Employment Positions
SambaNova offers a competitive total rewards package, including the base salary, plus equity and benefits. We cover 95% premium coverage for employee medical insurance, and 77% premium coverage for dependents and offer a Health Savings Account (HSA) with employer contribution. We also offer Dental, Vision, Short/Long term Disability, Basic Life, Voluntary Life, and AD&D insurance plans in addition to Flexible Spending Account (FSA) options like Health Care, Limited Purpose, and Dependent Care. Our library of well-being benefits available to you and your dependents includes a full subscription to Headspace, Gympass+ membership with access to physical gyms, One Medical membership, counseling services with an Employee Assistance Program, and much more.

Skills Required

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or Computer Science
  • 5+ years of ASIC RTL design experience
  • Strong foundation in computer architecture and digital logic design
  • Strong SystemVerilog RTL design skills for high-performance ASICs
  • Experience making power, performance, and area trade-offs
  • Knowledge of AXI, PCIe, Ethernet, and HBM or DDR interconnects and protocols
  • Experience with digital logic synthesis tools and static timing analysis
  • Proficiency with linting, clock domain crossing, and logical equivalence checking tools
  • Experience implementing SystemVerilog Assertions
  • Familiarity with hardware performance analysis and tuning tools and simulators
  • Familiarity with Git
  • Python and Linux shell scripting skills
  • Master's degree or Ph.D. in Electrical Engineering, Computer Engineering, or Computer Science
  • Exposure to a full ASIC development cycle through tape-out and production silicon
  • Interest in or knowledge of AI workload acceleration techniques
  • Experience with clock gating and DVFS at advanced process nodes
  • Exposure to emulation or FPGA prototyping platforms
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The Company
HQ: Palo Alto, CA
500 Employees
Year Founded: 2017

What We Do

AI is changing the world and at SambaNova, we believe that you don’t need unlimited resources to take advantage of the most advanced, valuable AI capabilities - capabilities that are helping organizations explore the universe, find cures for cancer, and giving companies access to insights that provide a competitive edge. We deliver the world’s fastest and only complete AI solution for enterprises and governments with world-record inference performance and accuracy. Powered by the SambaNova SN40L Reconfigurable Dataflow Unit (RDU), organizations can build a technology backbone for the next decade of AI innovation with SambaNova Suite. Our fully integrated hardware-software system, DataScale®, enables organizations to train, fine-tune, and deploy the most demanding AI workloads using the largest and most challenging models. Most recently, with the launch of our newest offering, SambaNova Cloud, developers can supercharge AI-powered applications on Llama 3.2 models. SambaNova was founded in 2017 in Palo Alto, California, by a group of industry luminaries, business leaders, and world-class innovators who understand AI. Today, we’ve built an incredibly smart and motivated team dedicated to making a lasting impact on the industry and equipping our customers to thrive in the new era of AI.

Why Work With Us

As a talent first company, we aim to hire the greatest and most innovative minds in the industry- driving the next generation of AI computing where no barrier is too high and the possibilities are truly limitless. We encourage our peers to take risks and take the initiative to make a lasting impact on the AI and ML industries.

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