Senior Principal Engineer

Posted 2 Days Ago
Be an Early Applicant
San Jose, CA, USA
In-Office
239K-299K Annually
Senior level
3D Printing
The Role
Leads development of high-current BCD and low-voltage GaN test vehicles from architecture through silicon bring-up. Designs and simulates power stages, devices, IC layouts, modules, packages, and evaluation boards. Develops characterization plans, performs lab validation, correlates measured results with simulations, and collaborates with process, reliability, product, applications, and test engineering teams to qualify technologies and support product development.
Summary Generated by Built In
Job Description

We are seeking a Power Design Engineer to lead the development of test vehicles supporting our high-current BCD (Bipolar-CMOS-DMOS) and low-voltage GaN power process and product portfolios. This role owns test vehicle definition, circuit and layout design, and characterization planning from concept through silicon bring-up, working closely with process development, product engineering, and applications teams. The ideal candidate has hands-on experience designing power devices and circuits at both the IC and module level, and is fluent in the power topologies these test vehicles are ultimately intended to support.

Key Responsibilities

  • Define, design, and drive execution of test vehicles (TVs) for high-current BCD and LV GaN process technologies, including device test structures, scaled power stages, and full-function demonstration circuits.
  • Translate process capability targets and product roadmap requirements into test vehicle architecture and specifications.
  • Design and simulate power stage circuits (e.g., synchronous buck/boost, multiphase, half-bridge/DrMOS, gate drivers) used to validate device performance under realistic switching and thermal conditions.
  • Select and characterize power devices (LDMOS, trench MOSFETs, LV GaN HEMTs, Schottky/sync rectifiers) for inclusion in test structures, working with device/process engineering on layout-dependent tradeoffs (RDS(ON), Qg, breakdown voltage, SOA).
  • Perform IC-level layout and design for test structures, including parasitic-aware layout for switch nodes, current sensing, and gate drive paths.
  • Extend designs to module/package level as needed — co-design of power stages with packaging, magnetics, and PCB layout for evaluation boards and system-level test vehicles.
  • Develop test and characterization plans covering DC parametrics, switching performance, efficiency, transient response, and voltage/current stress margins (including switch-node ringing and abs-max validation).
  • Lead or support silicon bring-up, debug, and correlation of measured results against simulation and design targets.
  • Collaborate cross-functionally with process integration, reliability, product/applications engineering, and test engineering to close the loop from process split data to product-ready specifications.
  • Document design methodology, test vehicle results, and characterization data to support technology qualification and product development decisions.

Qualifications

  • Bachelor's or Master's degree in Electrical Engineering, Microelectronics, or related field.
  • 10+ years of hands-on design experience in power semiconductor devices, analog/power ICs, or power electronics.
  • Strong working knowledge of power conversion topologies (e.g., buck, boost, multiphase/interleaved converters, half-bridge, DrMOS/Intelli-Phase-style architectures) and how topology choices drive device requirements.
  • Solid understanding of power device physics and tradeoffs across BCD process technologies and GaN (particularly low-voltage GaN HEMTs) — including RDS(ON), switching loss, gate charge, breakdown/avalanche behavior, and thermal characteristics.
  • Demonstrated experience designing test structures or test chips/vehicles for process technology development (not just product design) — comfortable defining what a process node needs to prove out.
  • IC-level design and layout experience, including parasitic-sensitive layout practices for high-current switching nodes.
  • Experience taking designs beyond the die level to module, package, or board level (e.g., power module co-design, evaluation board layout, thermal/electrical co-design).
  • Proficiency with circuit simulation tools (SPICE or equivalent) and familiarity with device/TCAD simulation concepts.
  • Ability to interpret and specify absolute maximum ratings, transient voltage tolerance, and protection thresholds (OVP/UVP/OCP/OTP) relevant to power stage reliability.
  • Strong lab skills: bring-up, debug, and characterization using oscilloscopes, curve tracers, power analyzers, and thermal imaging.

Additional Information

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.

Skills Required

  • Bachelor's or Master's degree in Electrical Engineering, Microelectronics, or a related field
  • 10+ years of hands-on design experience in power semiconductor devices, analog/power ICs, or power electronics
  • Strong knowledge of buck, boost, multiphase/interleaved, half-bridge, and DrMOS/Intelli-Phase-style power conversion topologies
  • Understanding of power device physics and BCD and low-voltage GaN tradeoffs, including RDS(ON), switching loss, gate charge, breakdown/avalanche behavior, and thermal characteristics
  • Experience designing test structures or test chips/vehicles for process technology development
  • IC-level design and layout experience with parasitic-sensitive high-current switching nodes
  • Experience with module, package, or board-level design, including power module co-design, evaluation board layout, or thermal/electrical co-design
  • Proficiency with SPICE or equivalent circuit simulation tools and familiarity with device or TCAD simulation concepts
  • Ability to interpret and specify absolute maximum ratings, transient voltage tolerance, and OVP, UVP, OCP, and OTP protection thresholds
  • Strong laboratory skills using oscilloscopes, curve tracers, power analyzers, and thermal imaging

Renesas Electronics Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Renesas Electronics and has not been reviewed or approved by Renesas Electronics.

  • Fair & Transparent Compensation — Feedback suggests pay is generally fair-to-good across many roles, with base pay aligned to prevailing market levels in multiple U.S. locations. Engineering and leadership tracks can be competitive on total compensation, reinforcing a sense that pay can meet market expectations in key job families.
  • Healthcare Strength — Feedback suggests core medical, dental, and vision coverage is solid and well-regarded by employees. Day-one eligibility in U.S. roles is described, supporting confidence in access and continuity of care.
  • Leave & Time Off Breadth — Feedback suggests PTO, paid holidays, sick time, and parental leave provide a comprehensive time-off framework. Company initiatives like Renesas Day and meeting-light Focus Fridays further support time away and balance.

Renesas Electronics Insights

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The Company
HQ: Tokyo
10,040 Employees

What We Do

We're the world's leading semiconductor manufacturer. Our mission is to make our lives easier and a world that's safer, healthier, greener, and smarter.

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