Senior NAND Logic Design / Verification Engineer

Company Description

Join a multibillion-dollar global company that brings together amazing technology, people, and operational scale to become a powerhouse in the memory industry. Headquartered in Rancho Cordova, California, Solidigm combines elements of an established, successful technology company with the spirit, agility, and entrepreneurial mindset of a start-up. In addition to the U.S. headquarters and other facilities in the U.S., the company has international presence in Asia, Europe, and the Americas. Solidigm will continue to lead the world in innovating new Memory technologies with aspirations to be the #1 NAND memory company in the world. At Solidigm, we view problems as opportunities to define innovative solutions that hold the power to change the world and unleash the potential technological needs that the future holds. At Solidigm, we are One Team that fosters a diverse, equitable, and inclusive culture that embraces individual uniqueness and empowers us to bring our best selves to deliver excellence in support of Solidigm's vision and mission to be the go-to partner for optimized data storage solutions. You can be part of the takeoff of an innovative business that develops cutting-edge products, delivers strong business value for customers, provides an engaging workplace for its employees, and serves a greater impact on the world. This is a golden opportunity for the right applicant to join us and help design, build, and lead Solidigm. We want a diverse team of dedicated professionals who will not just be Solidigm team members but contribute to how we shape the future of the organization. We are seeking applicants who will grow and thrive in our culture; be customer inspired, trusting, innovative, team-oriented, inclusive, results driven, collaborative, passionate, and flexible.

Job Description

As a logic design and/or verification engineer, you will play a central role in ensuring performance of 3D NAND designs. Your expertise will be crucial in designing and verifying NAND design that meet its stringent power, performance specs and driving development of world class verification strategies to guarantee worldclass reliable products.

Key Responsibilities

• Design logic and develop microcode to enable features to improve performance.
• Perform logic verifications of 3D NAND designs using latest methodologies.
• Generate verification and coverage plans, construct necessary ULT test benches and fullchip models to achieve comprehensive coverage.
• Troubleshoot and resolve logic and microcode bugs within pre-si verification and post Si validation.
• Collaborate with architects, analog and Core designers and APR teams to enhance and achieve power, performance and functional targets. Formulate functional and Dfx test plans that are comprehensive including system centric validation tests.

Qualifications

• A Master's degree in Electrical or Computer Engineering with at least 5 years of relevant NAND experience, or a bachelor's degree in Electrical or Computer Engineering with 7+ years of relevant experience.
• Proficiency in Verilog, System verilog and industry standard logic simulation tools is a must.
• Expertise in test bench development using system verilog and UVM/OVM concepts. Experience in test generation, SVA, coverage analysis, failure debugging is a must.
• Automating using Perl, Python,C/C++ or TCL is a plus.
• Prior experience in 3D NAND memory design will be considered a significant asset.

Additional Information

For California, Colorado, New York, Washington, and remote roles: The compensation range for this role is $127,260 - $203,620. Actual compensation is influenced by a variety of factors including but not limited to skills, experience, qualifications, and geographic location.