Senior Mixed Signal Circuit Design Engineer

Reposted 25 Days Ago
Be an Early Applicant
2 Locations
In-Office
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
The Role
Design, architect, and implement high-speed SerDes and mixed-signal circuits from schematic to silicon. Lead transistor-level builds, collaborate on layout and floorplanning, perform simulation (noise, Monte Carlo, loop stability), and drive post-silicon bring-up, verification, and debugging to optimize performance in deep-submicron FinFET processes.
Summary Generated by Built In

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

Are you ready to take innovation further? At NVIDIA, we don’t just follow the industry; we define the next generation of connectivity. We seek a visionary Analog/Mixed-Signal Engineer to build and implement high-speed Serdes reaching 80Gbps and beyond. If you enjoy working with deep-submicron CMOS and excel in FinFET technology’s complexities, and want to see your work evolve from a blank schematic to high-performance silicon, this is your opportunity. Join us and be part of a company transforming computer graphics, PC gaming, and accelerated computing!

What you'll be doing:

  • Architect the Future: Take full ownership of high-speed Serdes architectures and transistor-level builds, pushing data rates to 80Gbps and higher. 
  • Silicon Ownership: Drive the entire lifecycle—from initial concept and schematic entry to layout, verification, and final silicon characterization.

  • Master the Physics: Optimize complex circuits for peak system performance, balancing noise, power, and loop stability in deep-submicron nodes.

  • Collaborative Precision: Partner closely with layout engineers to provide strategic floorplanning and high-speed routing mentorship that ensures design integrity.

  • Solve the Impossible: Lead post-silicon bring-up and debugging efforts, translating real-world data into build refinements.

What we need to see:

  • MS in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience in the industry.

  • Minimum 5 plus years of professional Analog Build experience, with a deep portfolio in FinFET and deep-submicron CMOS processes.

  • The Toolkit: Proficiency in the Cadence Virtuoso environment and a "black belt" in simulation tools (Spectre, HSpice, FineSim, or XA).

  • Analytical Rigor: Expertise in noise analysis, Monte Carlo simulations, and complex loop stability. Rich experience in high-speed data and/or clock path design.

  • Modeling Mastery: Proven ability in the modeling, timing, and functionality of both analog and digital circuits to streamline top-level verification.

  • The X-Factor: You go beyond working in a silo. You are a collaborative teammate who communicates clearly and solves problems with a "find a way" mentality.

Skills Required

  • MS in Electrical Engineering, Computer Engineering, or related field (or equivalent experience)
  • Minimum 5+ years professional analog build experience with FinFET and deep-submicron CMOS processes
  • Proficiency in Cadence Virtuoso environment
  • Proficiency with simulation tools: Spectre, HSpice, FineSim, or XA
  • Expertise in noise analysis, Monte Carlo simulations, and complex loop stability
  • Experience in high-speed data and/or clock path design (SerDes targeting 80Gbps+)
  • Ability to model, time, and verify both analog and digital circuits for top-level verification
  • Experience with post-silicon bring-up and debugging of silicon
  • Strong collaboration and communication skills with layout and cross-functional teams

NVIDIA Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about NVIDIA and has not been reviewed or approved by NVIDIA.

  • Equity Value & Accessibility Equity awards and a discounted ESPP are highlighted as core parts of total compensation, enabling employees to share in the company’s success. Stock-based compensation and the two-year lookback ESPP are consistently described as especially valuable.
  • Healthcare Strength Health coverage is portrayed as robust, with comprehensive medical, dental, and vision options alongside mental health support and on-site care resources. Employer HSA contributions and wellness perks reinforce the depth of the offering.
  • Retirement Support Retirement programs are depicted as strong, featuring a meaningful 401(k) match with Roth options and support for Mega Backdoor Roth contributions. These elements position long-term savings as a notable advantage of the total rewards package.

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The Company
HQ: Santa Clara, CA
21,960 Employees
Year Founded: 1993

What We Do

NVIDIA’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, NVIDIA is increasingly known as “the AI computing company.”

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