Qualifications
- Thorough knowledge of industry standard EDA tools from Cadence, Mentor and Synopsys.
- Must be able to set up LVS, DRC, ERC environments and debug verification issues using Cadence and Mentor tools.
- Experience with layout of high performance analog blocks such as analog to digital converters, references, digital to analog converters, PLL etc. desired.
- Experience with floor planning, block level routing and top level chip assembly.
- Knowledge of high performance analog layout techniques such as common centroid layout, shielding, use of dummy devices, thermal aware layout with consideration for electromigration.
- Demonstrated experience with analog layout for silicon chips in mass production.
- Experience with deep sub-micron design in foundry CMOS nodes 28nm and below preferred.
- Experience working with distributed design teams a plus.
- Knowledge of skill code an layout automation a plus.
- Self starter with the ability to define and adhere to a schedule.
- Must possess strong written and verbal communication skills.
- 10+ years experience in high performance analog layout in advanced CMOS process.
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What We Do
Omni Design Technologies is a leading provider of high-performance, ultra-low power IP cores in advanced FinFET nodes to 28nm, that enable differentiated systems-on-chip (SoCs) in applications ranging from 5G, wireline and optical communications, LiDAR, radar, networking, AI, image sensors, and IoT. Our data converter (ADC and DAC) IP cores range from 6-bit to 14-bit resolution and from a few Msps to over 20 Gsps sampling rates. Omni Design, founded in 2015 by semiconductor industry veterans, has an excellent track record of innovation and collaboration with customers to enable their success. The company is headquartered in Milpitas, California with additional design centers in Fort Collins, Colorado, Boston, Massachusetts and Bangalore, India.
