Senior Engineer - SiC Technologist

Navitas Semiconductor is seeking a highly motivated Senior Engineer – SiC Technologist to join the India Center of Excellence and support the development, characterization, qualification, and continuous improvement of GeneSiC™ silicon carbide power semiconductor technologies. This role will contribute to next-generation SiC device platforms, including MOSFETs, diodes, known-good-die, discretes, and power module technologies for high-voltage, high-efficiency applications across AI data centers, energy and grid infrastructure, industrial electrification, renewable energy, EV charging, and high-performance power conversion markets.

• Support SiC technology development activities across device design, process integration, characterization, reliability, and product qualification.
• Develop and execute electrical characterization plans for SiC power devices, including breakdown voltage, leakage, threshold voltage, on-resistance, transfer/output characteristics, capacitance, gate charge, switching losses, avalanche robustness, and short-circuit behavior.
• Analyze wafer-level, package-level, and application-level data to identify performance trends, process sensitivities, yield limiters, and reliability risks.
• Collaborate with global device engineering, process integration, product engineering, packaging, test, reliability, quality, and applications teams to drive technology improvements.
• Support accelerated reliability testing and robustness assessments such as HTRB, HTGB, H3TRB/THB, temperature cycling, power cycling, TDDB, HTOL, dynamic stress testing, avalanche/UIS, and short-circuit ruggedness.
• Perform root-cause analysis for device performance or reliability issues using electrical data, statistical analysis, failure analysis inputs, and process history.
• Contribute to design-of-experiments planning, split-lot analysis, process change evaluation, and technology transfer activities.
• Develop automated data analysis workflows and characterization dashboards using tools such as Python, JMP, Excel, MATLAB, or equivalent platforms.
• Prepare clear technical reports, qualification summaries, review presentations, and engineering recommendations for internal stakeholders.
• Mentor junior engineers and help build SiC technology expertise within the India Center of Excellence.

• Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, Materials Science, Physics, Microelectronics, Semiconductor Technology, or a related discipline.
• 4–8 years of relevant experience in semiconductor device engineering, power device characterization, reliability, test, product engineering, process integration, or technology development.
• Strong understanding of SiC power device physics, including MOSFETs, JFETs, Schottky diodes, PiN diodes, gate oxide behavior, body diode behavior, and high-voltage device operation.
• Hands-on experience with semiconductor characterization equipment such as curve tracers, high-voltage SMUs, parametric analyzers, oscilloscopes, double-pulse testers, thermal chambers, probe stations, or reliability stress systems.
• Experience analyzing device performance over voltage, current, temperature, switching, and stress conditions.
• Working knowledge of reliability mechanisms in wide-bandgap power devices, including gate oxide degradation, threshold voltage instability, leakage drift, dynamic RDS(on), bipolar degradation, trapping effects, and package-related thermo-mechanical stress.
• Ability to interpret statistical data, identify trends, communicate technical conclusions, and recommend corrective actions.
• Strong written and verbal communication skills, with the ability to collaborate across global, cross-functional teams.

• Master’s degree or Ph.D. with specialization in power semiconductor devices, SiC technology, semiconductor reliability, or power electronics.
• Experience with 650 V, 750 V, 1200 V, 1700 V, or higher-voltage SiC MOSFET and diode technologies.
• Familiarity with automotive, industrial, or renewable-energy qualification standards and customer requirements.
• Experience with TCAD, SPICE, electrothermal simulation, device modeling, or mission-profile-based reliability assessment.
• Exposure to wafer fabrication, epitaxy, implantation, oxidation, metallization, passivation, wafer thinning, assembly, or power module integration.
• Experience working with external foundries, OSATs, failure analysis labs, universities, or global technology partners.
• Demonstrated ability to publish technical work, file patents, or present in technical reviews, conferences, or customer-facing forums.

• Deep technical curiosity and strong problem-solving discipline.
• Data-driven decision-making with strong statistical and analytical capability.
• Ability to connect device physics, process behavior, package effects, and application-level performance.
• Comfort working in ambiguous technology-development environments with evolving priorities.
• Strong collaboration across time zones with global engineering and business stakeholders.
• Clear communication of complex technical information to engineering, program, quality, and leadership audiences.
• Ownership mindset with the ability to independently drive experiments, analysis, reviews, and closure of technical issues.

• Timely execution of characterization, reliability, and technology-development deliverables.
• High-quality technical analysis that enables clear decisions on device performance, robustness, yield, and qualification readiness.
• Effective collaboration with global teams to resolve technology issues and accelerate project milestones.
• Measurable contribution to SiC technology capability building within the India Center of Excellence.
• Improved efficiency through reusable test methods, analysis templates, dashboards, or documented best practices.

The role will report into the SiC Technology / Device Engineering leadership team and will work closely with global stakeholders in technology development, product engineering, reliability, quality, applications, packaging, test engineering, and manufacturing operations.