Senior Engineer, Design Verification Engineering

Posted 14 Days Ago
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Cairo, EGY
In-Office
Senior level
Artificial Intelligence • Hardware • Automation • Manufacturing
The Role
Develops and maintains SystemVerilog/UVM functional and formal verification environments for semiconductor designs. Responsibilities include creating verification plans, constrained-random and firmware-driven tests, SVA assertions, protocol VIP integrations, formal coverage models, and proof strategies. The role analyzes coverage, convergence, counterexamples, and regressions while collaborating on SoC, emulation, firmware integration, and post-silicon validation. Requires expertise in digital design verification, semiconductor interfaces, scripting, and embedded processor testing.
Summary Generated by Built In

About Analog Devices

Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $11 billion in FY25, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at www.analog.com and on LinkedIn and X.

          

Senior Engineer, Design Verification Engineering

Key Responsibilities

  • Create, enhance, and maintain SystemVerilog/UVM verification environments, checkers, scoreboards, assertions, and functional coverage models.
  • Develop comprehensive verification plans and Metric Driven verification closure through code coverage, functional coverage, assertion coverage, and regression analysis.
  • Develop constrained-random and directed test scenarios targeting functional, security, and corner-case behaviors.
  • Maintaining and upgrading existing testbenches to accommodate new features.
  • Writing firmware-driven test cases (C) for embedded processor co-simulation.
  • Architecting formal verification environments from scratch including FPV wrappers, constraints, and proof orchestration scripts.
  • Writing SVA assertions and assumptions for protocol compliance, data integrity, arbitration fairness, and design intent.
  • Integrating protocol VIPs (AMBA AHB/APB) within Formal/Functional Verification environments for protocol compliance checking.
  • Developing formal coverage models and analyzing proof convergence, unreachability, and counterexamples.
  • Collaboration with designers and system engineers to perform cross-block verification.
  • Contributing to top-level SoC verification with boot sequences and system initialization, Support emulation, firmware integration, and post-silicon validation activities.

Minimum Qualifications

  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering,.
  • At least 3+ years of experience in Design Verification.
  • Proficient in SystemVerilog, SVA (SystemVerilog Assertions), and UVM.
  • Proficient in functional coverage and constrained-random verification environments.
  • Hands-on experience building formal property verification (FPV) environments from scratch — wrappers, constraints, clock/reset setup, proof strategies.
  • Experience writing SVA for bus protocol verification (AMBA AHB/APB/AXI).
  • Experience with common SoC interfaces such as APB, AHB, AXI, QSPI, UART, and DMA architectures.
  • Experience with C/C++ for firmware-level test development.
  • Scripting experience (Python, Tcl, shell programming)

Preferred Qualifications

  • Experience integrating commercial protocol VIPs (Cadence VIPs, Synopsys VIP, or equivalent) in formal/functional verification environments.
  • Familiarity with AI-assisted engineering tools and verification productivity workflows.
  • Experience debugging formal counter examples and refining constraint environments to eliminate false negatives.
  • Familiarity with ARM Cortex-M processor verification.
  • Experience with non-volatile memory verification (ECC, BIST, repair flows).
  • Knowledge of mixed-signal or analog-on-top verification methodologies.
  • Familiarity with code/version control tools (Perforce, Git).
  • Experience with emulation or FPGA prototyping.

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export  licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls.  As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.

Job Req Type: Experienced

          

Required Travel: Yes, 10% of the time

          

Shift Type: 1st Shift/Days

Skills Required

  • Bachelor's or Master's degree in Electrical Engineering or Computer Engineering
  • At least 3 years of design verification experience
  • Proficiency in SystemVerilog, SVA, and UVM
  • Experience with functional coverage and constrained-random verification environments
  • Hands-on experience building formal property verification environments from scratch, including wrappers, constraints, clock/reset setup, and proof strategies
  • Experience writing SVA for AMBA AHB, APB, or AXI bus protocol verification
  • Experience with APB, AHB, AXI, QSPI, UART, and DMA architectures
  • Experience with C or C++ for firmware-level test development
  • Scripting experience with Python, Tcl, or shell programming
  • Experience integrating commercial protocol VIPs such as Cadence VIP or Synopsys VIP
  • Familiarity with AI-assisted engineering tools and verification productivity workflows
  • Experience debugging formal counterexamples and refining constraint environments
  • Familiarity with ARM Cortex-M processor verification
  • Experience with non-volatile memory verification, including ECC, BIST, and repair flows
  • Knowledge of mixed-signal or analog-on-top verification methodologies
  • Familiarity with Perforce or Git
  • Experience with emulation or FPGA prototyping

Analog Devices Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Analog Devices and has not been reviewed or approved by Analog Devices.

  • Retirement Support The 401(k) program is described as a standout feature, with company contribution up to 8% of base salary and immediate vesting. This structure strengthens long-term value even when cash compensation perceptions vary.
  • Healthcare Strength Health coverage is positioned as comprehensive, including medical, dental, and vision options along with disability and life insurance. Day-one eligibility and multiple plan choices add to perceived robustness.
  • Leave & Time Off Breadth Paid time off appears broad, with vacation ranging from roughly 17–25 days and increasing up to five weeks with tenure, alongside sick time and paid holidays. Parental leave and related time-off provisions further expand coverage.

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The Company
HQ: Wilmington, MA
20,292 Employees
Year Founded: 1965

What We Do

Analog Devices, Inc. (NASDAQ: ADI) operates at the center of the modern digital economy, converting real-world phenomena into actionable insight with its comprehensive suite of analog and mixed signal, power management, radio frequency (RF), and digital and sensor technologies. ADI serves 125,000 customers worldwide with more than 75,000 products in the industrial, communications, automotive, and consumer markets. ADI is headquartered in Wilmington, MA.

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