Senior Engineer - CPU DV

Posted 5 Hours Ago
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Hyderabad, Telangana, IND
In-Office
Senior level
Software
The Role
Own end-to-end verification of CPU core components and microarchitectural features, including out-of-order execution, branch prediction, cache coherency, virtual memory, RAS, and functional safety. Develop SystemVerilog/UVM testbenches, constrained-random tests, scoreboards, checkers, and coverage models. Drive regressions, debug simulation and emulation failures, validate ISA behavior, and achieve coverage closure in collaboration with architecture and design teams.
Summary Generated by Built In
About SiFive

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.  

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions.  Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time. 

Are you ready?  

To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.

Job Description:

 

Key Responsibilities

  • CPU Core Verification
  • Own end-to-end verification of CPU core components (Fetch, Decode, Execute, Memory, Pipeline, Cache, MMU)
  • Validate microarchitectural features such as:
  • Out-of-order execution
  • Branch prediction
  • Cache coherency
  • Virtual memory & paging
  • RAS and Fusa
  • Develop test plans from architecture specifications and ensure full coverage closure
  • Verification Methodology & Execution
  • Lead verification using System Verilog / UVM

Develop:

  • Testbenches
  • Constrained-random tests
  • Scoreboards and checkers
  • Coverage models (functional + code)
  • Drive regressions and debug complex failures across simulation/emulation platforms
  •  Architecture & Feature Validation
  • Work closely with Architecture & Design teams to:
  • Understand ISA behavior (e.g., ARM ISA, RISC-V, or x86)
  • Validate corner cases, exceptions, interrupts
  • Perform ISA-level validation and compliance testing

Additional Information:

This position requires a successful background and reference checks and satisfactory proof of your right to work in:

India

Any offer of employment for this position is also contingent on the Company verifying that you are a authorized for access to export-controlled technology under applicable export control laws or, if you are not already authorized, our ability to successfully obtain any necessary export license(s) or other approvals.

SiFive is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees.

Skills Required

  • Experience with CPU core verification and microarchitectural feature validation
  • Proficiency with SystemVerilog and UVM verification methodology
  • Experience developing testbenches, constrained-random tests, scoreboards, checkers, and functional/code coverage models
  • Ability to create test plans from architecture specifications and drive coverage closure
  • Understanding of ARM, RISC-V, or x86 instruction set architecture behavior
  • Ability to perform ISA-level validation and compliance testing
  • Successful background and reference checks
  • Right to work in India
  • Authorization to access export-controlled technology or ability to obtain required export licenses
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The Company
HQ: Santa Clara, CA
552 Employees
Year Founded: 2015

What We Do

The heart of SiFive is RISC-V! SiFive creates the building blocks of RISC-V-based IP that are the inevitable innovative reimagining of every computing platform.

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