Jobs at SiFive

The role involves architecting and maintaining the Verification Platform build system, developing tools and build flows, and educating teams on best practices.

The Design Verification Engineer will develop internal processor models and tools, create test cases, and collaborate with teams for verification needs.

Design and implement CPU power management, reset, and clocking solutions. Collaborate with teams to verify and optimize designs based on RISC-V architecture.

The Verification Engineer ensures the accuracy of highly configurable cores and other IPs through state-of-the-art methodologies, test planning, execution, and quality assurance.

Lead the architecture of physical implementation for high-speed CPU designs, focusing on automated ML-driven methodologies and PPA optimization, while interacting with EDA partners.

Develop and maintain core tools for microprocessor design, including simulation and build tools. Requires systems-level programming and tool validation experience.

The role involves designing and implementing CPU cores using RISC-V architecture, collaborating with various teams for verification and optimization, and ensuring high-quality design through documentation and teamwork.

Design and develop system software for RISC-V processors, including Linux kernel, device drivers, OpenSBI, u-boot, and Yocto/OpenEmbedded. Collaborate with architecture and hardware teams, debug complex multicore systems using GDB/JTAG/OpenOCD, and upstream and release open-source and proprietary software.

Design and implement new features for RISC-V CPU architectures, improve performance, verify designs, and collaborate with cross-functional teams.

The role involves optimizing JVM performance on RISC-V architecture, analyzing CPU and memory efficiency, and collaborating on JIT compiler improvements.

Design interconnect IP, architect TileLink interconnect, enhance performance, integrate into SiFive's framework, perform verification, and maintain documentation.

Lead a performance engineering team to research and develop high-performance processor architectures, defining targets and guiding implementation in RTL, while analyzing performance bottlenecks.

The Director of Sales for Commercial Accounts at SiFive is responsible for prospecting new accounts, creating account plans, managing CRM databases, and improving the sales process while achieving financial targets.

Lead the timing signoff process for high-speed data center CPUs, innovate methodologies, manage SDCs, and ensure quality design closure.

Design and implement debug, trace, and profiling hardware, collaborate with cross-functional teams, and lead improvements in hardware design processes.

The SOC Architect will lead the development of high-performance SoCs, defining security features, and collaborating with product teams and customers to deliver system IPs.

Develop and run SystemVerilog/UVM tests for high-performance RISC-V CPU verification. Write targeted tests using internal test generators, implement test plans, target coverage scenarios, and integrate third-party VIPs and bus interfaces like AXI/PCIe.

Design and implement TileLink interconnects, cache controllers, protocol bridges and other uncore logic as configurable RTL generators (Chisel). Integrate designs into SiFive's Chisel/FIRRTL framework, enable automatic configuration, verification, and documentation, and collaborate with verification teams and peers to deliver high-performance, configurable interconnect IP.

Design and implement high-performance cache subsystems for RISC-V CPU cores, collaborating on microarchitecture and verification with a focus on quality and performance.

The role involves developing and maintaining a Verification Platform for Design Verification, including libraries and tools in Scala and Python. It requires collaboration with various teams to address software-related pain points and educate on best practices.