The Sales Director will expand SiFive's market share by researching and growing customer relationships in North America, particularly in the semiconductor and technology sectors. Responsibilities include defining technical and commercial needs, managing key customer relationships, collaborating with marketing efforts, and generating strategic sales plans. The role requires strong organizational and negotiation skills, along with proven sales experience in a high-pressure environment.

The role involves leading a team in power convergence, reduction, and modeling for high-performance cores. It requires enabling power simulation and optimization, emphasizing ASIC analysis, and requires scripting skills in Python, Perl, or Tcl. Communication and presentation skills are essential for reporting power status to stakeholders.

The Senior Engineer in Design Verification Power Management will focus on low power management, leading multiple projects, and performing power simulation. The role requires collaboration and excellent problem-solving skills in a diverse environment.

The Senior Software Machine Learning Engineer will develop high-performance algorithms and software libraries for RISC-V machines, engage in co-design efforts, and improve compiler optimizations. They will lead projects from conception to release while collaborating with cross-functional teams.

The Staff Hardware Application Engineer will support customers using SiFive IPs, resolve technical issues, provide on-site support, deliver training, and improve documentation. Preferably, candidates should possess over 10 years of experience in the field and have a strong background in CPU architectures.

The Staff Engineer - CPU Verification role involves hands-on verification of block and CPU subsystems using SV and UVM. Responsibilities include writing test cases for RISC-V CPU verification, developing test plans, and debugging using Assembly code while leveraging knowledge of scripting and bus interface protocols.

As a Senior Software Engineer on SiFive's Platform Execution team, you will develop scalable software flows that interface with verification tools for RISC-V Core IP products, while collaborating with customers and design engineers.

As a Staff Software Engineer at SiFive, you will architect and implement features for the language driving sandboxing and verification workflows. Responsibilities include developing tools for language ecosystems and collaborating with other teams to enhance flow automation for RISC-V core IP products.

In this role, you will enhance and develop debugging and profiling tools for SiFive RISC-V processors, including OpenOCD, GDB, and LLDB. Responsibilities include improving existing tools, synchronizing with the community, collaborating with cross-functional teams, and providing customer support. You will focus on low-level software development and performance optimization.

As a Sr. Staff System and Software Architect at SiFive, you will design and implement RISC-V computing platforms, working cross-functionally across software and hardware architecture. Responsibilities include architecting CPU cores and subsystems while addressing architectural challenges, collaborating for testing strategies, and authoring architecture specifications for new features.

The Staff Engineer will be responsible for hands-on system Verilog/UVM development work for high-performance CPU verification, including writing test cases and using test generators for RISC-V CPU verification. They will engage in coverage/test-plan scenarios and require significant experience in CPU verification and programming.

The Director of Physical Design will optimize SiFive's RISC-V IPs from RTL to GDSII, focusing on performance, power, and area goals. Responsibilities include collaborating with various teams to enhance physical design implementation, resolving design issues for customers, and developing automation for PPA collateral generation. The role involves significant leadership and a customer-focused approach in physical design.

As a Senior CPU Design Verification Engineer at SiFive, you'll collaborate with various teams to generate and debug test cases, analyze random test cases for coverage enhancement, and support the integration of verification flows in the RTL design process.

The Senior Staff Software Engineer will engage in low-level embedded software development, focusing on planning, designing, developing, testing, and debugging software for CoreIP simulation. This role requires strong collaboration with team members and architects to enhance existing solutions and integrate new features, leveraging expertise in SoC architecture and various programming languages.

As a UPF Methodology Engineer, you will drive UPF methodology and manage feasibility studies with the Power Management Architect. Responsibilities include implementing UPF for power intent and verification, collaborating on low power design at the chip level, and defining new power methodologies with EDA tools and vendors.

The Sr. Technical Program Manager at SiFive will manage processor core IP development programs, coordinating with engineers and product marketing to ensure timely and quality product releases. Responsibilities include developing execution plans, tracking program risks, and improving project management processes.

The Principal Performance Tools Engineer will lead the development of a performance simulation tool suite for RISC-V based CPU IPs. Responsibilities include identifying tool requirements, devising a strategic vision, and overseeing a team to execute the plans. The role requires extensive experience in performance simulation across different architectures and strong skills in software engineering practices.

The Principal Performance Pathfinding Engineer leads a team to research and develop high-performance processors. This involves defining architecture and performance targets, conducting experiments on micro-architecture features, and collaborating with design teams to meet performance targets in RTL.

The Sr Staff Engineer in Physical Design will lead the implementation and optimization of high-performance Out of Order RISC-V CPUs. This role involves collaborating with microarchitecture and RTL teams to enhance PPA trade-offs while developing automation workflows for physical implementation.

The Sales Director is responsible for expanding the customer base for SiFive IP products in North America, managing relationships with key customers, defining technical and commercial needs for successful product launches, and generating strategic sales plans in collaboration with various teams within the company.