Senior Digital Design Engineer - High-Speed I/O and Photonics

Posted 10 Days Ago
Be an Early Applicant
Santa Clara, CA, USA
In-Office
136K-265K Annually
Senior level
Artificial Intelligence • Computer Vision • Hardware • Robotics • Metaverse
The Role
Design and implement high-speed digital front-end and back-end for DSPs and silicon photonics IPs: define micro-architecture, calibration algorithms, translate to RTL/firmware, create synthesis constraints, drive timing closure, evaluate PPA trade-offs, and lead post-silicon bring-up, testing, characterization, and cross-functional production handoff.
Summary Generated by Built In

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today.

The mixed-signal high-speed I/O group delivers innovative PHY designs that power the most powerful AI systems in the world today. Our portfolio includes PHY IPs and Chips for both copper and fiber channels, supporting NVIDIA's high-performance interconnect protocols: NVLINK, Ethernet, and InfiniBand. We recently delivered the industry's first 200G MRM-based silicon photonics chip, revolutionizing high-performance networking and enabling the era of Co-Packaged Optics (CPO) for NVIDIA. We enable groundbreaking technology that continually pushes the limits of wireline communication!

What You'll Be Doing:

While engaged in frontend development, your responsibilities will include working on a wide range of high-speed, powerful DSPs, silicon photonics IPs, and chips. You will participate in chip-level features, programming model and application interface definitions. You will collaborate closely with analog designers and system architects to develop micro-architecture specifications, calibration and adaptation algorithms, which then will be translated into RTL and firmware designs. For backend design, you will define, build synthesis constraints and drive timing closure. Evaluating PPA trade-offs based on synthesis and P&R feedbacks is a critical step toward the most optimized product. For post-silicon, you will actively participate in silicon bring-up, build testing scripts for debugging, characterization, performance tuning, and production. You will also work with cross-functional teams to ensure successful production.

What We Need to See:

  • B.S. or M.S. degree in Electrical Engineering or equivalent experience.

  • 5+ years of experience in high-speed digital design, proficient with front-end design flow and tools.

  • Deep understanding of Verilog or System Verilog, logic design concepts, and typical structures.

  • Good understanding of design for test, timing constraints, and static timing analysis.

  • Experience with industry verification methodologies, such as UVM.

Ways to stand out from the crowd:

  • Knowledge of optical transceiver devices and integrated components such as modulators, detectors, and TIAs.

  • Experience with SerDes architecture and building blocks such as CDR, DFE, CTLE, TXFIR.

  • Experience with digital assist analog designs, such as calibrations.

  • Familiarity with mixed-signal circuit design concepts and experience in behavior modeling of mixed-signal circuits. Knowledge of physical layer and communication protocols, such as Ethernet, InfiniBand, PCIe, and USB.

  • Understanding of on-chip microcontrollers and standard peripherals, with exposure to hardware and firmware co-design.

#LI-Hybrid

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until June 12, 2026.

This posting is for an existing vacancy. 

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Skills Required

  • B.S. or M.S. degree in Electrical Engineering or equivalent experience.
  • 5+ years of experience in high-speed digital design, proficient with front-end design flow and tools.
  • Deep understanding of Verilog or System Verilog, logic design concepts, and typical structures.
  • Good understanding of design for test, timing constraints, and static timing analysis.
  • Experience with industry verification methodologies, such as UVM.
  • Knowledge of optical transceiver devices and integrated components (modulators, detectors, TIAs).
  • Experience with SerDes architecture and building blocks such as CDR, DFE, CTLE, TXFIR.
  • Experience with digital assist analog designs, such as calibrations.
  • Familiarity with mixed-signal circuit design concepts and behavior modeling of mixed-signal circuits.
  • Knowledge of physical layer and communication protocols such as Ethernet, InfiniBand, PCIe, and USB.
  • Understanding of on-chip microcontrollers and standard peripherals, with exposure to hardware and firmware co-design.

NVIDIA Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about NVIDIA and has not been reviewed or approved by NVIDIA.

  • Equity Value & Accessibility Equity awards and a discounted ESPP are highlighted as core parts of total compensation, enabling employees to share in the company’s success. Stock-based compensation and the two-year lookback ESPP are consistently described as especially valuable.
  • Healthcare Strength Health coverage is portrayed as robust, with comprehensive medical, dental, and vision options alongside mental health support and on-site care resources. Employer HSA contributions and wellness perks reinforce the depth of the offering.
  • Retirement Support Retirement programs are depicted as strong, featuring a meaningful 401(k) match with Roth options and support for Mega Backdoor Roth contributions. These elements position long-term savings as a notable advantage of the total rewards package.

NVIDIA Insights

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The Company
HQ: Santa Clara, CA
21,960 Employees
Year Founded: 1993

What We Do

NVIDIA’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing — with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, NVIDIA is increasingly known as “the AI computing company.”

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