Job Description:
What You'll Be Doing:
- Testbenches: Build scalable verification environments using UVM and SystemVerilog.
- Planning: Create detailed verification plans from architectural specifications.
- Execution: Write, run, and debug constrained-random tests and directed tests.
- Coverage: Define, measure, and close functional and code coverage metrics.
- Gate-Level: Run gate-level simulations to verify power-up and timing states.
- Automation: Develop scripts to automate regression runs and triage failures.
What We Are Looking For:
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- Languages: Strong proficiency in SystemVerilog and scripting (Python, Perl, or Tcl).
- Methodology: Hands-on experience with UVM (Universal Verification Methodology)
- Tools: Experience with industry-standard simulators Cadence Xcelium preferred, but experience with Synopsys VCS, or Siemens Questa will translate
- Concepts: Deep understanding of constrained-random verification, assertions (SVA), and functional coverage.
- Protocols: Knowledge of common protocols like AMBA (AXI/AHB/APB)
Preferred Qualifications
- Experience with formal verification tools and methodologies.
- Background in power-aware verification using UPF/CPF.
- Experience verifying custom ARM or DSP processor cores.
- Familiarity with emulation platforms like Palladium.
- Experience with:
- MMU verification
- SRAM/ memory subsystem verification
- Nice-to-have:
- DSP verification experience
- Modeling (RNM / behavioral models)
- Scope of Work
- Verification at system/subsystem level, using SV/UVM + C-based testing, with emulation (Cadence Palladium).
- New co-processing subsystem ((with NPU, MMU, SRAM, AXI).
- Memory subsystem interactions
- DSP/signal processing
- SystemVerilog + UVM-based verification
- C-based test development (processor-in-loop simulation)
- Use of emulation platforms (Cadence Palladium or similar)
- Some modeling using Real Number Models (RNM) for analog/digital interaction
- Verification at system/subsystem level, using SV/UVM + C-based testing, with emulation (Cadence Palladium).
- Key Skills Needed |
- Strong DV fundamentals
- Experience with:
- MMU verification
- SRAM/memory subsystem verification
- Bus protocols (AXI transition mentioned)
- Nice-to-have:
- DSP verification experience
- Modeling (RNM / behavioral models)
What’s In It for You:
At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That’s why we offer competitive financial compensation, including various compensation plans and a solid benefits package.
- Medical, Dental, Vision Insurance
- 401k, With Matching Contributions
- Short-Term/Long-Term Disability Insurance
- Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
- Paid Time Off (including sick, holiday, vacation, etc.)
- Tuition Reimbursement
- Growth Opportunities
- And more!
Work Arrangement Fully OnSite: Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.
Location: Complete On-Site at Minneapolis, MN (Preferred)/ Phoenix, AZ
About eInfochips: eInfochips, an Arrow company (Fortune #154), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow’s $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow’s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries & verticals.
EEO Statement: Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)
Location:US-MN-Minnesota (Remote Employees)Remote work employees may be required to be present at the closest designated Arrow office for work-related purposes, at the Company’s request and sole discretion.
Time Type:Full time
Job Category:Engineering ServicesEEO Statement:
Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)
All Arrow job postings are for existing job vacancies. We anticipate this requisition will be open for a minimum of five days, though it may be open for a longer period of time. We encourage your prompt application.
Skills Required
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
- Strong proficiency in SystemVerilog.
- Hands-on experience with UVM (Universal Verification Methodology).
- Scripting experience (Python, Perl, or Tcl) for automation and regression.
- Experience with industry-standard simulators (Cadence Xcelium, Synopsys VCS, or Siemens Questa).
- Deep understanding of constrained-random verification, assertions (SVA), and functional coverage.
- Knowledge of AMBA protocols (AXI, AHB, APB).
- Experience building scalable verification environments and testbenches in SV/UVM.
- Experience with gate-level simulation to verify power-up and timing states.
- Ability to develop scripts to automate regression runs and triage failures.
- C-based test development / processor-in-loop simulation (scope of work).
- Experience with formal verification tools and methodologies.
- Power-aware verification experience using UPF/CPF.
- Experience verifying custom ARM or DSP processor cores.
- Familiarity with emulation platforms such as Cadence Palladium.
- MMU verification experience.
- SRAM / memory subsystem verification experience.
- DSP verification experience and RNM/behavioral modeling.
Arrow Electronics, Inc. Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Arrow Electronics, Inc. and has not been reviewed or approved by Arrow Electronics, Inc..
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Healthcare Strength — Healthcare offerings are positioned as robust, with multiple medical plan options and access to telemedicine, EAP, and wellbeing programs. Income-banded premium support is described as helping keep the base plan more affordable for lower earners.
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Leave & Time Off Breadth — Time-off programs include unlimited PTO for U.S. salaried employees alongside accrual-based vacation and sick programs for hourly staff. Paid parental leave is described as available with a defined fully paid period for new parents.
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Parental & Family Support — Family-focused supports include subsidized back-up childcare and eldercare days and dependent-care spending options. These offerings add practical value beyond base pay, particularly for caregivers.
Arrow Electronics, Inc. Insights
What We Do
A Fortune 500 company, ranked #133 in 2024, with over 22,000 employees worldwide, Arrow guides innovation forward for over 220,000 leading technology manufacturers and service providers. With 2023 sales of $33 billion, Arrow develops technology solutions that improve business and daily life. Arrow.com is the easiest place for innovators to create, make and manage technology.
Why Work With Us
Arrow is much more than products and services. We are a team of many backgrounds in a global ecosystem, working toward one common goal: to help customers create a better tomorrow, where innovation improves the quality of life and the benefits of technology are more accessible to all. Join us in building a better tomorrow for many!
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