Join the Team That's Redefining Wireless Technology
At Tarana, we're more than just a fast-growing tech company—we’re a team of bold innovators on a mission to revolutionize broadband. Our groundbreaking Fixed Wireless Access technology is delivering fiber-class internet speeds worldwide, bridging the digital divide in ways previously thought impossible.
This position will challenge you! The Senior ASIC Design Engineer will work on complex ASIC designs for our point to multipoint wireless products.
What you’ll be doing:
- Architecture and micro-architecture of digital subsystems
- RTL design of digital circuits using Verilog
- Frontend design development and integration of large ASIC designs including: Integration of Processors, Bus, Memory, and Interface IPs
- Chip level integration and verification
- RTL design and integration of large functional blocks in the modem - Development, assessment and refinement of RTL design to target power, performance, area and timing goals
- Write design documents including detailed interface descriptions and design descriptions
- Work with Verification Engineers to develop specifications and test plans. Ensure robust design and complete coverage
- Work with Emulation teams to test the design on various emulation platforms
- Work with Software and Systems teams on system verification and system integration
- Writing test cases and test benches to verify functionality of designs
What You'll Need:
- BSEE required/MSEE preferred
- 5-12 years of experience in SoC design
- Experience with Synthesis, Lint, CDC and other standard ASIC development tools
- Proficient in Verilog and C
- Working knowledge of scripting languages such as Python
- Excellent communication skills
Highly preferred:
- Design or integration of ARM, MIPS, Risc-V, ARC or other processors
- Design or integration of DDR controllers
- Knowledge or experience with Digital Signal Processing, or Channel Coding.
- Knowledge of wireless protocols such as 802.11a/b/g/n/ac or hands-on experience with LTE/4G/5G
- Knowledge or experience with Ethernet packet processing
- Experience with embedded software development
- Experience with emulation platforms
- Experience with post silicon bringup
Compensation and Benefits:
The salary range for this position is: $130,000 to $210,000
Compensation will be determined based on several factors including, but not limited to: skill set, years of experience and the employee’s geographic location.
Tarana provides competitive benefits to employees in this role including: Medical, dental and vision benefits, 401K match, flexible time off and stock option.
Join Tarana and help shape the future of wireless connectivity.
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What We Do
Tarana’s mission is to accelerate the deployment of fast, affordable internet access around the world. Through a decade of R&D and more than $400M of investment, the Tarana team has created a unique next-generation fixed wireless access (ngFWA) technology instantiated in its first commercial platform, Gigabit 1 (G1). It delivers a game-changing advance in broadband economics in both mainstream and underserved markets, using either licensed or unlicensed spectrum. G1 started production in mid-2021 and has since been embraced by more than 250 service providers in 19 countries and 41 US states.
Tarana is headquartered in Milpitas, California, with additional research and development in Pune, India. Visit our website for more on G1.
