Senior ASIC Design Engineer

Posted 2 Days Ago
Be an Early Applicant
2 Locations
Remote or Hybrid
Senior level
Software
The Role
Design and implement ASIC functional blocks and IP for coherent optical networking chips. Responsibilities include architecture analysis, microarchitecture, RTL and API coding, lint, CDC, constraints, synthesis, debugging, block integration, physical design collaboration, and lab testing. The role requires meeting area, timing, and power targets while partnering with architects, verification, physical design, and lab validation teams.
Summary Generated by Built In

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise

 Join Optical Networks division, where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.

Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group.
Work as part of a world class ASIC design team, building leading edge chips for the Coherent Optics market.
 

Responsibilities

Role:

In this role you are expected to work with architects to understand the requirements, document them and implement the functional block or an IP.

What you will be doing:

• Work closely with Architects to understand the requirements, document them, and implement the functional block or an IP

• Capture the design intent, uArch, RTL coding, API coding, lint, constraints development, CDC, and synthesis

• Debug the designs and work with verification team members to get a functionally clean block

• Integrate blocks and create physical design blocks for place and route

• Work with Physical Design team to ensure that the design meets area, timing, power requirements

• Test their design block in the lab and work with lab validation team members

Qualifications

What we seek:

• Ability to abstract complex functions

• Ability to do the uArch using block diagrams, waveforms and mathematical and logical models/equations

• Good understanding of use of FIFOs, state machines

• Exposure to RTL coding using Verilog/system Verilog

• Good logic design skills with ability to understand timing, area and power reports

• Experience in timing constraints development, running lint and CDC checks, synthesis using ASIC or FPGA tools

• Interested in using assertions and formal property verification to develop bug free designs

• Experience of 5+ years in design (uArch, RTL coding, RTL checks and debug)

Preferred: Prior experience in Ethernet/Networking domain 

About the Team

Some of our benefits in India:

  • Flexible and hybrid working arrangements to support work–life balance
  • Health and well-being support – medical insurance for you and your family, health check-ups, life and accident insurance, well-being programs, and employee resource groups 
  • A minimum of 90 days of Maternity and Paternity Leave based on eligibility
  • Personal Support Service 24/7 – a confidential support channel open to all Nokia employees and their families in challenging situations
  • Career growth & mobility – technical career paths, job rotations, international assignments, and relocation support
  • Continuous learning – technical certifications, mentoring programs, coaching, and digital learning platforms
  • Opportunities to innovate and contribute through Nokia’s research and development environment
  • Recognition programs that celebrate outstanding contributions
  • Workplace support – ergonomic working support and mobile device programs based on eligibility

Skills Required

  • Ability to abstract complex functions
  • Ability to develop microarchitecture using block diagrams, waveforms, and mathematical or logical models
  • Good understanding of FIFOs and state machines
  • Exposure to RTL coding using Verilog or SystemVerilog
  • Good logic design skills and ability to understand timing, area, and power reports
  • Experience developing timing constraints, running lint and CDC checks, and performing synthesis using ASIC or FPGA tools
  • Interest in using assertions and formal property verification
  • 5+ years of experience in microarchitecture, RTL coding, RTL checks, and debugging
  • Prior experience in Ethernet or networking

Nokia Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Nokia and has not been reviewed or approved by Nokia.

  • Equity Value & Accessibility Equity programs include a global employee share purchase plan with company matching and multi‑year share awards. These mechanisms broaden participation and tie rewards to long‑term outcomes.
  • Healthcare Strength Health coverage includes major medical plans with supplementary options such as vision, legal services, and care navigation. The range of offerings indicates comprehensive support for medical needs.
  • Parental & Family Support A global policy grants paid leave for new parents regardless of gender and provides structured return‑to‑work support. Company‑paid life insurance further strengthens family protection across regions.

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The Company
HQ: Espoo
132,624 Employees

What We Do

At Nokia, we create technology that helps the world act together. As a trusted partner for critical networks, we are committed to innovation and technology leadership across mobile, fixed and cloud networks. We create value with intellectual property and long-term research, led by the award-winning Nokia Bell Labs. Adhering to the highest standards of integrity and security, we help build the capabilities needed for a more productive, sustainable and inclusive world.

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