Process Integration, Yield and Defect Reduction Engineering Lead

Posted 22 Days Ago
Be an Early Applicant
Albuquerque, NM, USA
In-Office
141K-199K Annually
Senior level
Artificial Intelligence • Cloud • Information Technology • Software
Creating world-changing technology that enriches the lives of every person on earth.
The Role
Leads process integration, yield improvement, and defect reduction for Intel’s advanced packaging manufacturing operations. The role supports technology transfer, manufacturing ramp, and sustainment while collaborating with engineering and factory teams. Responsibilities include analyzing defectivity and parametric data, applying statistical process control and DOE, identifying yield limiters, improving quality and reliability, developing monitoring dashboards, and leading cross-functional technical initiatives in a high-volume semiconductor environment.
Summary Generated by Built In
Job Details:

Job Description: 

The New Mexico Silicon Manufacturing (NM Si Manufacturing) Integration Team is seeking a highly motivated engineering professional with a strong technical background to grow into a Process Integration (PI) Team Lead role. This position reports directly to the NM Si Manufacturing Integration Director and offers the opportunity to lead teams of technical contributors supporting Intel's advanced packaging manufacturing operations.

In this role, you will collaborate closely with Advanced Packaging High-Volume Manufacturing (HVM) engineering and factory operations teams to support the transfer, ramp, and sustainment of advanced packaging technologies. You will play a critical role in ensuring successful execution against foundry customer commitments while driving continuous improvements in yield, quality, reliability, and manufacturing efficiency.

The ideal candidate will have a proven track record of technical leadership, innovation, and cross-functional collaboration. Success in this position requires strong problem-solving skills, the ability to influence across organizations, and a passion for enabling technology development in a high-volume manufacturing environment.

Qualifications:

Minimum Qualifications:

  • Bachelor's or Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, Materials Science, Microelectronics Engineering, Chemistry, Physics, or a related technical field.
  • 5+ years of experience in semiconductor manufacturing or advanced packaging.
  • In addition, candidates should possess experience in one or more of the following areas:
    • 5+ years of experience in process integration or defect reduction for backend interconnect or advanced packaging processes.
    • 3+ years of experience applying Design of Experiments (DOE) methodologies.
    • 5+ years of experience in data analysis and statistical process control using tools such as JMP, SQL, PCS, or similar platforms.

Preferred Qualifications:

Technical Skills and Experience

  • Strong understanding of semiconductor manufacturing process flow and advanced packaging technologies.
  • Knowledge of process capability analysis, specification management, statistical variation, and process control methodologies.
  • Proven ability to analyze defectivity and parametric data to identify yield limiters and drive process improvements.
  • Experience with yield analysis and defect reduction methodologies.
  • Experience applying Failure Modes and Effects Analysis (FMEA) techniques.
  • Experience developing inline monitoring systems, dashboards, and manufacturing health metrics.

Leadership and Problem Solving

  • Demonstrated success leading technology development, transfer, and manufacturing ramp activities.
  • Proven ability to solve complex technical challenges using innovative and data-driven approaches.
  • Strong project management, communication, and stakeholder management skills.
  • Ability to lead cross-functional teams and influence technical decisions across multiple organizations.
  • Experience driving operational excellence, yield improvement, and manufacturing efficiency initiatives.

          

Job Type:Experienced Hire

Shift:Shift 1 (United States of America)

Primary Location: US, New Mexico, Albuquerque

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.



Annual Salary Range for jobs which could be performed in the US: $140,830.00-198,820.00 USD

The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Skills Required

  • Bachelor’s or Master’s degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, Materials Science, Microelectronics Engineering, Chemistry, Physics, or a related technical field
  • 5+ years of experience in semiconductor manufacturing or advanced packaging
  • 5+ years of experience in process integration or defect reduction for backend interconnect or advanced packaging processes
  • 3+ years of experience applying Design of Experiments methodologies
  • 5+ years of experience in data analysis and statistical process control using JMP, SQL, PCS, or similar platforms
  • Strong understanding of semiconductor manufacturing process flow and advanced packaging technologies
  • Knowledge of process capability analysis, specification management, statistical variation, and process control methodologies
  • Experience analyzing defectivity and parametric data to identify yield limiters and drive process improvements
  • Experience with yield analysis and defect reduction methodologies
  • Experience applying Failure Modes and Effects Analysis techniques
  • Experience developing inline monitoring systems, dashboards, and manufacturing health metrics
  • Experience leading technology development, transfer, and manufacturing ramp activities
  • Strong project management, communication, and stakeholder management skills
  • Ability to lead cross-functional teams and influence technical decisions across multiple organizations
  • Experience driving operational excellence, yield improvement, and manufacturing efficiency initiatives

Intel Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.

  • Leave & Time Off Breadth Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
  • Parental & Family Support Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
  • Healthcare Strength Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.

Intel Insights

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The Company
HQ: Santa Clara, CA
75,000 Employees
Year Founded: 1968

What We Do

Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside. With more ingenuity and creativity inside, our work is at the heart of countless innovations. From major breakthroughs to things that make everyday life better— they’re all powered by Intel technology. With a career at Intel, you can help make the future more wonderful for everyone.

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