Principal Software Engineer

Posted An Hour Ago
Be an Early Applicant
Cork, IRL
In-Office
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
Develop and optimize parasitic extraction software (Quantus) including algorithm design, high-performance C++ coding, debugging, memory and performance optimization, GUI integration, and collaboration with cross-functional teams to deliver production-quality EDA tools and support customer issues.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Title:                Principal Software Engineer

 

Location:                Cork

 

Reports to:               Principal Software Engineer

 

 

Job Overview:

Cadence Design Systems is looking for a highly motivated software engineer to work with the R&D engineering team in the Digital & Signoff Group.

Job Responsibilities:

This role will be with the Quantus product.  Quantus is the industry leading parasitic extraction software product that enables cutting edge chip design across the globe. R&D Software Engineering role in Parasitic Extraction area is a multi-faceted position encapsulating a mix of software development, algorithm development, software debugging, performance optimization, accuracy analysis, GUI development and integration with layout/schematic editors as well as state of the art simulators.

You will be also expected to design, develop, fix bugs and respond to customer queries, define project completion checklists; collaborate with cross-function teams.

You will have a chance to contribute to the main Physical Verification flows in EDA industry and your work will be visible through billions of electronic devices deployed worldwide.

 

Job Qualifications:

  • Bachelor’s in computer Science or Electrical Engineering;  + 7 years of related experience or
  • Masters + 5 years related experience

 

Key Skills

  • Hands-on coding & debugging (C++) in a UNIX environment for computationally intensive applications. Experience of working with multiple developers on large codebases is valued
  • Proven ability to make programs run faster and consume less memory using algorithmic optimization, multi-threading, distribution, HPC. Ability to analyse complexity (big O notation) is a must
  • Familiar with the full software development lifecycle from Requirements to final delivery.
  • Software development environments, version control, Linux, scripting languages such as Tcl/Perl/Python
  • Excellent communication skills - the ability to share complex ideas & information is paramount.

 

 

Additional Skills/Preferences:       

  • Existing EDA tool development experience
  • Maths or physics background with knowledge and implementation experience of any of the following: Computational geometry, numerical methods, solving large systems of linear equations, Maxwell’s equations & model order reduction
  • GUI development, ideally using QT
  • Knowledge and implementation experience with the chip design flow, layout connectivity, parasitic extraction, LEF/DEF is a big plus

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • Bachelor's in Computer Science or Electrical Engineering with 7+ years related experience, or Master's with 5+ years related experience
  • Hands-on coding and debugging in C++ in a UNIX/Linux environment
  • Algorithmic optimization, multi-threading, distribution, HPC and complexity analysis (Big O notation)
  • Familiarity with the full software development lifecycle from requirements to final delivery
  • Experience with software development environments, version control, Linux, and scripting languages such as Tcl, Perl, Python
  • Excellent communication skills
  • Existing EDA tool development experience
  • Maths or physics background and implementation experience in computational geometry, numerical methods, large linear systems, Maxwell's equations, or model order reduction
  • GUI development experience, ideally using Qt
  • Knowledge of chip design flow, layout connectivity, parasitic extraction, LEF/DEF

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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