The Role
Design and implement verification environments for pre-silicon, create test plans, debug issues, and develop tools for testing Digital Design and SoCs.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
- Design and implement a full, dedicated, and flexible (e.g., UVM based) verification environment
- Involved with all aspects of pre-silicon verification at unit and system level to ensure functional correctness and performance of the overall system-level solution.
- Defining verification strategy from IP to top digital integration
- Define requirements for block level and full-chip level verification infrastructure
- Create test plans for unit-level and chip-level verification and post-silicon validation
- Debug failures and drive in-time resolution of bugs
- Create coverage monitors and drive coverage to required quality targets
- Develop tools, test benches, and test suites (UVM, C++/C ) to execute test plans.
- Write functional coverage, analyze both code and functional coverage, and close coverage gaps
- Develop and use unit level test benches that use functional tests as well as constrained random stimulus.
- When needed, define and develop formal verification environment
- BS or MS in EE, CS or related engineering discipline
- 5-10 years of demonstrated experience in verification of IPs, Digital Design and SoCs
- Strong experience in design and verification standards and methodologies (SVA, UVM/OVM).
- In-depth knowledge of Verilog and System Verilog HDL and experience with simulators and waveform debugging tools
- Solid understanding and experience with verification of Digital Design and SoC architectures including test planning, constrained random test generation, test stimulus, code coverage, functional coverage.
- A thorough understanding of the high-level verification flow methodology (test plan generation, test generation, failure analysis, coverage analysis and closure).
- Strong experience creating test benches and automating regression test suites, preparing, and presenting detailed verification reviews
- Knowledge of state-of-the-art EDA tools (e.g., Cadence Xcelium…)
- Experience with formal verification is plus.
- Programming experience in languages common to the industry (e.g., C, C++, Shell scripting)
- Solid scripting skills (Python preferred or Perl or TCL).
- Knowledge of test and DFT (Scan insertion, Scan compression, test coverage analysis, ATPG pattern generation, simulation and debug, IEEE 1149.1, 1500 and 1687 standards)
Skills Required
- BS or MS in Electrical Engineering, Computer Science, or related discipline
- 5-10 years experience in verification of IPs, Digital Design, and SoCs
- Strong experience in design and verification standards and methodologies
- In-depth knowledge of Verilog and System Verilog HDL
- Experience with simulators and waveform debugging tools
- Strong experience creating test benches and automating regression test suites
- Solid scripting skills, preferably in Python
- Knowledge of state-of-the-art EDA tools like Cadence Xcelium
- Experience with formal verification
Cadence Design Systems Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.
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Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
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Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
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Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.
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The Company
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
