Principal Design Verification Engineer

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M® product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform.
As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers’ specifications whether they’re a major telecom organization or automotive company, etc.

What You Can Expect

In this role, you will:

• Work on verification of Marvell's AI/ML, Network processing, Compute, Automotive, and Baseband SoCs and IPs.
• Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers using System Verilog and UVM methodology.
• Develop verification testplan and write tests using random techniques and coverage analysis, and work with designers to ensure it is complete.
• Develop tests and tune the environment to achieve coverage goals.
• Debug failures and work with designers to resolve issues.
• Architecting, developing and maintaining tools to streamline the design of state-of-the-art multicore SoCs.
• Experience with analysis/closure of code and functional coverage.

What We're Looking For

• Strong experience developing complex/random verification environments using System Verilog/UVM.
• Strong experience with writing and executing detailed verification test-plan.
• Strong experience with scripting languages such as Python or Perl and EDA verification tools, as well as bug tracking and regression mechanisms.
• Strong experience with object-oriented design and implementation.

Preferred/Plus:

• Hands-on verification experience with subsystems such as ARM/processor, memory, networking, NoC, and Cache designs.
• Experience with protocols such as AMBA, PCIe, Ethernet, I2C, SPI, and UART.
• Working knowledge of C/C++ for modeling and code development to run on ARM/processors.
• Familiarity with Post-Silicon validation and debug.
• Experience with Gate Level Simulations.
• Excellent communication skills to interface internally and externally with all levels of the organization and to participate in problem-solving and quality improvement activities.
• Demonstrates good analysis and problem-solving skills.
• Has an inherent sense of urgency and accountability.
• Must have the ability to define problems, issues, and opportunities, analyze data, establish facts, and draw valid conclusions from various datasets.
• Must have the ability to multi-task in a fast-paced environment.
• Work independently & manage deliverables to align with the project goals

Education:

• Bachelor’s degree in Computer Science, Electrical Engineering, or related fields and 10-15 years of related professional experience.
• Master’s degree and/or PhD in Computer Science, Electrical Engineering, or related fields with 5-10 years of experience.

#LI-TM1

Expected Base Pay Range (USD)

139,100 - 205,790, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements 

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at [email protected].

#LI-TM1