Jobs at Marvell Technology

Develop and maintain verification plans, architect simulation test benches, design tests, analyze coverage, debug failures, and collaborate on integration for pre-silicon verification.

Lead the Design Verification Team ensuring high quality ASIC development, defining methodologies, collaborating with teams, and improving productivity. Requires extensive experience in engineering and ASIC development.

The role entails driving functional verification of networking blocks, developing advanced testbenches, and collaborating across teams to improve methodologies in a semiconductor environment.

The Senior Staff Applications Engineer will focus on SerDes IP design, providing customer support, optimizing design performance, problem solving and cross-functional collaboration.

Lead a team of CAD engineers to manage EDA tools and design automation for semiconductor product development. Collaborate with design engineers and vendors to optimize workflows and ensure compliance with standards.

Responsible for ownership of key digital blocks in design, leading from architecture definition to implementation, focusing on optimization and verification aspects.

The Senior Director of Physical Design oversees end-to-end execution for complex SoCs, leading a large engineering organization, defining culture, and ensuring high-quality delivery across advanced technologies.

The Immigration & Global Mobility Specialist manages immigration processes, ensures compliance, and coordinates relocation services while supporting employees in multiple regions, primarily in Singapore.

The role involves implementing DFT solutions for SoCs, including verification and validation of test patterns and supporting methodology development.

As a Senior Design Verification Engineer, you'll drive functional verification of complex networking blocks, develop verification components, and collaborate with cross-functional teams within the Switch IP group at Marvell.

As an Analog Layout Staff Engineer, you will collaborate with global teams to run simulations, verify designs, and ensure successful project delivery in analog circuit layouts, while supporting the full development cycle from floorplan to final delivery.

The role involves leading digital block design from architecture to implementation, optimizing performance, and collaborating with verification engineers for alignment between design and verification goals.

This role involves architecting and implementing RTL for high-speed interfaces, driving hands-on execution, and providing technical leadership and mentorship while ensuring robust IP design quality.

The intern will design forward error correction (FEC) and DSP algorithms for optical transceivers, focusing on hardware implementation and system modeling.

The role involves analyzing and implementing advanced error correction techniques for optical transceivers using HDL. Candidates need a background in electronics or similar fields and experience in C, C++, and Verilog.

Seeking a Senior Database Engineer to design and scale data infrastructure for the RELIANT Telemetry Platform, focusing on ETL pipelines, database optimization, and real-time analytics while collaborating across teams.

The role involves supporting IC design and layout, silicon evaluation, and characterization while gaining advanced analog training and running simulations.

The Senior Staff Supply Chain Analyst will drive business process improvements, enhance forecasting models, partner across functions, and develop data-driven insights to optimize supply chain performance.

The Director of Analog Mixed Signal Design leads the development of high-speed optical circuits and manages a design team, ensuring performance and timely delivery of advanced modem technology.

The Principal SRAM Circuit Design Engineer will design, verify, and characterize high-performance SRAM, lead memory design projects, ensure circuit robustness, and enhance methodologies. The role requires collaboration with validation teams and deep knowledge in custom memory design and EDA tools.