Responsible for design, simulation, and implementation of DSP ASICs, researching optical communication requirements, producing signal processing solutions, and documenting work.

The role involves testing and validating mixed-signal applications, debugging silicon devices, and providing technical support to various business units focusing on high-speed I/O interfaces and semiconductor technologies.

Lead the design and development of high-speed analog mixed-signal circuits, perform transistor-level design, collaborate on specifications, and oversee production readiness.

The intern will engage in design verification, test pattern development, and testing logic insertion using Siemens EDA tools and UVM methodologies.

Support customers with software issues and product integration. Debug problems, validate fixes, and collaborate with engineering on networking products.

The role involves chip-level RTL verification for SOC functions, developing simulations and test plans, and collaborating with designers.

Lead advanced static timing analysis for complex digital designs, optimizing timing closure, collaborating with design teams, and maintaining timing constraints using EDA tools and methodologies.

Architect and develop a functional verification environment including test plans and testbenches. Collaborate with designers and debug simulation failures.

The role involves designing and verifying analog/mixed-signal circuits for high-speed CMOS transceiver/SERDES products, ensuring performance targets are met using industry-standard tools.

This role involves developing high-complexity Control and Management IPs for Switching chips, ensuring performance and quality requirements, collaborating with teams, and debugging post-silicon.

As a Senior Physical Design Engineer, you will design complex chips, manage workflows, and perform various analyses in a global team environment.

The Sr. Staff Design Verification Engineer will develop verification plans, create testbenches, perform verification, and collaborate with design teams to resolve issues.

Assist in layout design, silicon testing, and scripting analysis for DSP functions within the Custom Digital Design team.

The role involves designing and implementing digital control, DSP, and datapath logic for PHY IP, optimizing integration into SoCs, and mentoring junior engineers.

The Application Engineer will support semiconductor projects by debugging systems, developing scripts for testing, and providing customer technical support for Marvell's products.

Develop and manage ATE test programs for semiconductor chips, ensuring quality and collaboration with design teams while focusing on cost reduction and yield improvements.

Lead a team designing CMOS transceiver/SERDES/PLL products, manage analog IP delivery, and oversee architectural investigations and implementations.

The Senior Design Verification Engineer will verify circuitry for chips, focusing on functional testing in an embedded Linux environment, developing drivers and test code, and collaborating with hardware designers.

Design and verify mixed signal circuits like ADCs and PLLs, working on high-speed transceiver/SERDES products while applying innovative solutions.

Lead a team of analog mixed-signal design engineers to develop advanced circuits for high-speed wireline and optical products, ensuring quality delivery and collaboration across teams.