Develop and maintain Linux kernel network device drivers, integrate Linux Traffic Control frameworks, and collaborate with cross-functional teams for networking solutions.

As a Senior Principal Switch Architect, you'll define architecture for high-performance switch ASICs, work with engineering teams, and evaluate technology impacts.

The Business Analyst will support margin management and pricing decisions, collaborating with cross-functional teams to design BI dashboards, analyze metrics, automate reporting, and present insights to stakeholders.

As a Package Engineering Intern, you will engage in semiconductor package development, substrate design, and improve manufacturing processes while gaining hands-on experience.

Design and verify high-speed analog and mixed-signal ICs including transceiver/SERDES products, focusing on circuits like PLL, ADC, and regulators.

The role involves leading PHY Validation in post-silicon environments, performing high-speed signal analysis, debugging PHY protocol issues, and collaborating with cross-functional teams to address technical problems in storage devices.

The Global Account Manager leads Marvell's cloud sales strategy for semiconductor solutions, fostering customer relationships, driving sales, and ensuring successful deal closures.

The Senior Director of Product Line Management will drive product strategy and design wins for silicon photonics solutions, collaborating across teams to ensure market success.

As an Analog Layout Senior Staff Engineer, you will design and verify analog circuits, collaborate globally, and mentor teams through project lifecycles at Marvell.

The engineer will design and verify analog/mixed-signal circuits including ADCs, DACs, and PLLs for high-speed ICs, ensuring performance targets are met through innovative solutions and best practices.

The Principal Product Manager will drive the internal IP roadmap strategy, ensure cross-departmental alignment, and communicate with stakeholders and executives for project success.

The ASIC Design Engineer will define micro-architecture, implement low-power RTL designs, collaborate on verification plans, and support silicon bring-up.

Lead the Analog/Mixed-Signal IC Design team, developing CMOS transceiver products, overseeing design engineering, and ensuring project success through strategic leadership and technical expertise.

The AI Workflow Engineer Intern will work on end-to-end AI projects, support AI solution development, and enhance existing frameworks using Python while gaining hands-on experience with Databricks and AWS.

Intern will research AI system modeling, autonomous architectures, and network innovations while collaborating on hardware-software co-design projects.

The role involves ASIC design, focusing on post-RTL design flow including synthesis, timing closure, DFT support, and collaboration with design teams for SerDes IP solutions.

The role involves managing the failure analysis process, from testing to fault isolation, and generating reports while collaborating with partners and external labs.

Oversee and mentor a team in developing and verifying RTL designs for CPU subsystems and associated data path circuits while managing design IP.

As a Senior Staff Engineer in Analog Layout, you will run simulations, collaborate across global teams, and deliver analog circuits through the full development cycle, ensuring high standards and effective communication.

The Staff/Sr. Staff Software Engineer will develop embedded firmware, lead SW architecture and testing, collaborate with cross-functional teams, and travel for product development. Responsibilities include coding in C and Python, debugging, and training new hires.