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Lead and architect enterprise AI platforms, focusing on multi-agent orchestration and model lifecycle management. Collaborate with teams and strategize AI integration across business functions.
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As a 3rd party IP integration engineer, manage IP sourcing, development, integration, and validation related to memory interfaces in SoC design.
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Lead the architecture and design of complex SoCs, guiding cross-functional teams through specification, verification, and integration processes while mentoring junior members.
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Lead design verification of complex CPU sub-systems and ensure compliance with specifications. Develop test plans, mentor engineers, and verify subsystem methodologies.
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The role involves verifying CPU sub-systems, developing test plans, mentoring engineers, and ensuring designs meet specifications for high-speed data transfers.
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Lead SoC design verification, improve processes, collaborate on test plans, and support post-silicon validation. Architect simulation testbenches and execute test plans.
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As a Staff Engineer in RTL design, you will develop specifications, implement micro-architecture in RTL, and collaborate on synthesis, timing signoff, and verification tasks.
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Lead analog layout projects, ensuring adherence to methodologies and deadlines while collaborating with cross-functional teams and enhancing team capabilities through tool development and training.
