Design PCB hardware for various projects including chip test infrastructure, focusing on simulation, testing, component selection, and board-level diagnostics.

As a Staff Software & AI Engineer, you'll design and implement complex software and AI solutions, integrating AI methods with software systems, while collaborating with cross-functional teams in a dynamic environment.

Design and analyze mixed-signal analog ICs and power delivery at die, package, and PCB levels. Build system models, correlate lab measurements to simulations, and account for manufacturing variation to improve yield and robustness.

The role involves physical design and methodology for advanced processor chips. Responsibilities include collaborating with design teams, implementation, mentoring, and scripting for automation.

Provide technical support for ASIC integration, collaborating with customers and teams on design, validation, and troubleshooting to ensure successful implementations.

The role involves analyzing specifications, developing test plans and UVM components, running simulations, debugging, and improving coverage results in high-speed SerDes IPs.

Lead product engineering for high-speed RF products, manage new silicon brings-up, improve yield and manufacturing processes, and mentor junior engineers.

Lead the micro-architecture and RTL development for advanced SoC designs, ensuring functional correctness and integration across multiple systems while collaborating with various engineering teams.

Lead and manage an ASIC chip design team to deliver high-performance ASICs from microarchitecture through tape-out. Own technical execution, scheduling, risk management, cross-functional coordination, RTL development, synthesis, STA/timing closure, physical design, verification, subsystem integration, and PPA optimization to meet product and business goals.

Design and verify full‑custom analog layouts for next‑generation high‑speed SerDes IPs in advanced FinFET nodes. Perform RC extraction, EMIR/ESD/antenna layout solutions, physical verification (DRC/LVS/DFM) using Cadence Virtuoso, collaborate with global teams, and help automate layout flows.

Design and execute DFT and ATPG flows for custom silicon: insert and verify scan, MBIST, and IP test; generate and simulate test patterns; analyze coverage; support manufacturing test bring-up and debug; collaborate on flow improvements.

Design and verify full-custom analog/mixed-signal layouts for high-speed SerDes and foundational IPs using advanced FinFET nodes. Perform RC extraction, physical verification (DRC/LVS/DFM), EMIR/ESD/antenna mitigation, collaborate with global teams, and support automation/programming for layout flows.

Lead development of company-wide reliability sign-off methodologies, perform full-chip EM assessments and statistical budgeting, define package Imax, drive reliability characterization and test-vehicle efforts, liaise with foundries/OSATs, and shape long-term reliability strategy for advanced interconnect and packaging technologies.

As a Staff Quality Systems Engineer, you will implement and maintain quality management systems, lead cross-functional projects for efficiency, and ensure compliance with industry standards.

Lead executive compensation governance for a public company: manage annual calendar, prepare Compensation Committee materials and filings, build Excel models for pay decisions and scenario planning, coordinate with Legal/Finance and external advisors, support shareholder engagement, and ensure documented, compliant, scalable compensation processes.

Support Sales and Legal teams with drafting, reviewing, and managing sales contracts and amendments, maintaining contract records and version control, tracking deadlines and compliance, coordinating approvals, preparing summaries and reports, researching terms and best practices, and participating in process improvements.

Lead the Failure Analysis process for customer returns and internal failures, manage teams for root cause investigations, oversee lab equipment, and communicate effectively with customers and internal teams.

The Distinguished Engineer will define architectures for next-gen AI networking switch ASICs, evaluate performance trade-offs, and lead standards development in networking semiconductor architectures.

The Business Operations Analyst optimizes internal processes, manages P&L, collaborates with teams, and drives improvements in forecasting and reporting for semiconductor solutions.

The Principal Supply Chain Business Architect manages vendor relationships and internal projects, driving cross-functional collaboration and enhancing supply chain planning through advanced modeling techniques.