Marvell Technology
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The Staff Physical Design Engineer at Marvell will work on the physical design and methodology for next-generation high-performance processor chips. Responsibilities include synthesis, place and route, timing analysis, and collaborating with the design team. The role offers diverse engineering challenges in a collaborative environment.
Design, develop, and implement Automated Test Equipment solutions for semiconductor chips at Marvell. Lead test engineering activities and ensure quality and performance of products. Collaborate with cross-functional teams to meet customer specifications.
As a Physical Design Engineer at Marvell, you will be responsible for implementing and verifying complex SOC's in CMOS technology, running the verification process, and managing physical design activities to meet project schedules. You will also be involved in evaluating tools and CMOS technologies.
Work as a Senior Staff Design Verification Engineer at Marvell, responsible for verifying circuitry in chips for high-speed data transfers. Requires 8+ years of experience in chip design verification, expertise in System Verilog, UVM, and DDR technologies. Strong communication and collaboration skills are essential.
ASIC design engineer responsible for the design, verification, and evaluation of digital circuits in high-speed data communication ICs. Focus on improving design verification methodology and flow, collaborating with analog and DSP teams, and providing support to product teams for both pre and post silicon.
Marvell Semiconductor is seeking a Sr. Staff Technical IP Project Manager to oversee the end-to-end process of IP development and SOC-IP integration support. Responsibilities include collaborating with cross-functional teams, providing expert guidance on IP selection, driving continuous improvement initiatives, and acting as a key point of contact for stakeholders. The ideal candidate will have a Bachelor's degree in Electrical Engineering, 8+ years of experience in semiconductor IP development, and proficiency in project management tools and methodologies. Strong leadership, communication, and interpersonal skills are required.
Develop test plans for verification based on architecture and design specifications. Write tests in various languages to test logical features in ASIC and SOC design blocks. Analyze coverage and conduct reviews of design and verification tasks.
Work as a Staff Design Verification Engineer at Marvell, responsible for verifying RTL engineers' designs, running simulations, debugging, and presenting test plans. Requires Bachelor's or Master's degree in Computer Science or Electrical Engineering with 3-5 years of experience.
Seeking an RF and Analog Design Engineer with 5+ years of experience in high-performance RF/Analog Receiver/TIA design. Responsibilities include designing high-speed broadband ICs, leading edge transimpedance amplifier design, developing transmission line structures, and collaborating on post-silicon validation and customer support.
Looking for a talented 3rd party IP integration engineer with a minimum of 7 years of experience in project management and ASIC design flows. Responsibilities include managing 3rd party developers, integrating DDR type interfaces, and collaborating with internal and external teams for successful core integration.
Design high performance analog and mixed signal circuits using deep sub-micron CMOS technologies. Investigate and implement various circuits, evaluate methodologies for performance targets, guide layout implementation, collaborate with digital teams, conduct testing, and provide customer support.
The Engineering IP Program Manager at Marvell is responsible for managing the IP development and delivery for Marvell's products and custom ASIC businesses. This role involves program management, cross-functional leadership, and ensuring successful outcomes of IP development projects. The ideal candidate should have a strong background in semiconductor engineering and 10+ years of experience in the field.
Develop and execute EHS strategies, ensure regulatory compliance, support sustainability initiatives, provide EHS training, manage relationships with regulatory bodies, monitor EHS performance, and manage resources. Based in Bangalore, India.
Senior Staff Physical Design Engineer at Marvell in Santa Clara, CA responsible for physical design and methodology of high-performance processor chips. Tasks include synthesis, place and route, timing analysis, and ECOs. Must have 6+ years of experience and a Bachelor's or Master's degree in related fields.
Seeking a dynamic Senior Strategic Account Manager to drive sales growth and foster strategic relationships within the semiconductor industry. Responsibilities include managing key accounts, understanding customer needs, and aligning solutions for mutual success. Requires 10+ years of experience in sales/account management in high-tech industries.
Develop and size ASIC and system solution architectures for customer RFPs, create detailed customer proposals, provide technical leadership, collaborate with stakeholders, address security concerns, leverage expertise in custom ASICs, and engage with various internal and external teams for project development.
Lead a team of verification professionals in pre-silicon validation of complex SoC designs. Develop test strategies, analyze designs, and mentor junior engineers. Strong programming skills and experience with System Verilog, complex systems analysis, detailed test plans, scripting languages, EDA Verification tools, and Linux OS required.
Lead the development of optical components for Marvell's optics product line, collaborate with cross-functional teams, work on design automation and process development, and contribute to the full product lifecycle from inception to NPI.
Seeking an RF and Analog Design Engineer to contribute to the development of multi-tens of GHz Transimpedance Amplifiers TIAs. Responsible for leading edge optical modulator driver and transimpedance amplifier design primarily in Silicon Germanium BiCMOS technology. Design hi-performance broadband analog circuits for optical front-end receivers and transmitters, including modulator and laser drivers. Develop transmission line structures and other millimeter wave structures to enable higher performance.
Design and implement SoC execution and management platform, optimize drivers and applications for high performance, collaborate with hardware and software teams, interact with customers, and write documentation.