Jobs at Marvell Technology

The Senior Staff Engineer will develop advanced DFT techniques for ASIC/SoC designs, ensuring quality and compliance through collaboration with various teams and pre-silicon validation.

Lead NPI test development for Packaged Integrated Voltage Regulators (PIVR/IVR). Develop electrical test plans, ATE hardware (load boards, sockets) and firmware, and drive pre- and post-silicon validation and production test programs while collaborating with cross-functional teams to support HVM ramp.

Design, verify and implement high-performance PHY and DSP ASIC blocks. Develop ASIC specs, architecture and RTL (Verilog/SystemVerilog). Create and execute verification plans, run lint/CDC/power analyses, optimize datapath designs, and collaborate with global teams.

Serve as a strategic HR business partner to senior leaders across Operations, driving workforce planning, organizational design, talent management, leadership coaching, change management, and HR program delivery. Build trusted relationships, lead succession and talent review processes, implement engagement and development initiatives, use data to inform decisions, and support global teams to improve organizational health and performance.

Lead development of ATE test solutions for characterization, wafer sort and production on Advantest 93K and/or Teradyne platforms. Design high-speed ATE hardware, create test plans, convert design test patterns to ATE format, optimize test flows and collaborate with DFx and Design to improve yield and release production test programs.

Develop, automate, and maintain optical/electrical test methodologies and stations for silicon photonics products; support NPI and high-volume manufacturing ramps, collaborate cross-functionally, work with vendors/FA teams, and document test procedures and learnings.

Lead development of ATE test solutions for characterization, production, and wafer sort. Design high-speed ATE hardware, create test plans, convert design test patterns to ATE formats, optimize test flows, and collaborate with design/DFx teams to improve yield and testability. Release production test programs and innovate test methodologies for high-speed digital interfaces.

Lead ESD audit and compliance programs for suppliers and customers: perform EPA assessments, verify industry standards, oversee HBM/CDM sensitivity testing, validate control systems, develop readiness strategies, produce audit reports, deliver ESD training, support NPI, and advise on flooring and protective packaging for advanced semiconductor technology nodes.

The intern will design and validate circuits for high-speed broadband ICs, focusing on analog design, performance measurement, and collaboration with teams for production support.

Lead development and automation of physical verification CAD/EDA flows (DRC/LVS) using tools like Synopsys ICV and Calibre. Integrate and optimize EDA toolchains, support tape-out and foundry interfaces, debug DRC/LVS, create validation test cases, documentation, and provide technical guidance and training to design/layout teams.

Lead development of ATE test solutions for characterization, production, and wafer sort on Advantest 93K/Teradyne. Design high-speed ATE hardware, create test plans, convert design test patterns to ATE format, optimize test flows, collaborate with DFx/design, and ensure DFT/MBIST and high-speed interface compliance.

As a Senior Staff Engineer, you will develop ATE test solutions, design high-speed testing hardware, create test plans, and collaborate with cross-functional teams to ensure product quality and optimize testing processes.

As a Principal Design Verification Engineer, you will develop verification architectures, write test plans, and ensure design compliance across various technologies and industries.

The Principal Engineer will design critical IP, implement specifications, ensure quality, and collaborate across teams for digital IC design processes.

The Senior Principal Program Manager leads complex program execution in semiconductor solutions, managing cross-functional teams and ensuring successful delivery of design initiatives.

The Staff Engineer, Firmware Development will work in hardware lab supporting embedded operations, develop automation scripts, manage PCB inventory, and coordinate issue resolution with teams.

Architect, design, and develop high-performance firmware and system software (primarily in Rust) for ARM/MIPS SoC-based storage and networking products. Implement data-plane/fast-path features, optimize performance using hardware and simulators, support hardware bring-up and virtualization, collaborate cross-functionally to resolve customer issues, and lead/mentor engineers while planning and estimating project efforts.

Lead legal counsel for Marvell's India operations, advising on commercial, employment, data privacy, IP, regulatory and government-relations matters. Draft and negotiate agreements, manage investigations, litigation and outside counsel, develop policies, train staff, support licensing and compliance, mentor local team, and monitor laws and risks to enable business objectives.

Seeking an experienced ASIC implementation and synthesis engineer to develop timing constraints, perform physical design tasks, and improve design flows using scripting and industry-standard tools.

Lead design and implementation of SDK and embedded Linux software for Marvell switching/packet-processor products. Own full software lifecycle from requirements and architecture through implementation, testing, and maintenance. Provide technical leadership across distributed teams, collaborate with cross-functional groups, and mentor engineers. Focus on L2/L3 switching and routing protocols and scalable embedded network software.