Jobs at Marvell Technology

Leads strategic account management and executive customer relationships for Marvell’s semiconductor solutions. Responsibilities include developing account plans, growing revenue, managing complex sales cycles, negotiating commercial agreements, forecasting pipeline, coordinating cross-functional teams, resolving customer issues, and identifying expansion opportunities. The role requires deep semiconductor and infrastructure market knowledge, strong executive communication, commercial judgment, and at least 10 years of relevant sales or business development experience.

Lead SI/PI engineering for Marvell switch products: develop PDN and signal integrity solutions at package and system levels, perform simulations and tool evaluations, collaborate with layout and IP teams, optimize PDN performance, and validate designs with electromagnetic simulation and hands-on measurement.

Performs backend physical design and verification for complex processor and ASIC chips. Responsibilities include RTL-to-GDS implementation, place and route, static timing, physical verification, multi-voltage design, chip integration, design closure, AI-based flow integration, and scripting automation. Collaborates with cross-functional global teams and provides technical guidance to junior engineers.

Design Verification Intern supporting cloud-switch semiconductor verification. Responsibilities include developing UVM testbenches, monitors, checkers, test cases, and simulation environments; analyzing coverage and results; debugging failures; collaborating with designers; and automating verification data analysis using scripting languages.

Lead the Test Solutions Engineering team in APAC, focusing on ATE-based test development, new product introduction, and cross-functional collaboration.

Supports supply chain planning through analysis of demand, supply, inventory, backlog, and operational data. Develops reports, dashboards, and performance metrics; assists with forecasting, inventory management, new product introduction, production ramp, and continuous improvement. Collaborates with cross-functional teams and presents data-driven recommendations. The intern also supports planning processes and may use analytical, forecasting, automation, and business intelligence tools.

Owns end-to-end capacity planning across Marvell’s global OSAT subcontractor network. Develops near- and long-range capacity plans, maintains Kinaxis capacity models, manages constraints and bottlenecks, oversees supplier capacity governance and capital expenditure tracking, and runs scenario planning. Translates planning outputs into operational execution, supports customer fulfillment, builds executive dashboards, and coordinates cross-functional resolution of production issues. Requires semiconductor backend and direct OSAT subcontractor experience, plus S&OP or demand-supply balancing exposure.

Manage global subcontractor bump, sort, assembly, and test capacity to fulfill customer orders on time and cost-effectively. Coordinate production issues, monitor WIP and inventory in Oracle, provide management reporting, collaborate with engineering, quality, and test teams, and support cross-functional projects and system enhancements.

Leads Marvell’s global Optical Sales organization, owning revenue, bookings, design wins, forecasting, go-to-market strategy, strategic customer relationships, and commercial execution across hyperscaler and optical module accounts. Partners with business units and cross-functional teams on resource allocation, supply chain, product priorities, and geopolitical risk. Builds and develops a distributed global sales organization while driving account strategy, customer escalations, pipeline management, and succession planning.

Leads semiconductor product engineering for server and network processors, including digital and analog performance debugging, yield and test optimization, manufacturing specification development, production test flow improvements, customer escalation support, and new product, package, and fab qualification. Collaborates with design, test, hardware, firmware, DFT, DFM, process, and quality teams to improve yield, quality, test time, and defect metrics.

Supports Marvell’s IT PMO by tracking project status, timelines, budgets, risks, and milestones across active initiatives. Prepares stage-gate governance materials, coordinates reviews, follows up on action items, collaborates with vendors and stakeholders, builds dashboards and status reports, and improves PMO templates, tools, and workflows.

Design and validate high-performance broadband analog and mixed-signal circuits for optical and electrical receiver and transmitter chips. Responsibilities include developing CMOS and BiCMOS circuits, analog front ends, TIAs, drivers, regulators, sensors, and related circuitry; supporting tapeout, laboratory evaluation, post-silicon validation, qualification, production transition, and customer support.

Leads a team designing and validating high-speed broadband analog and mixed-signal ICs, including optical TIAs and modulator drivers using SiGe BiCMOS and FinFET technologies. Responsibilities include architecture, technical leadership, multidisciplinary collaboration, chip development through mass production, post-silicon validation, methodology development, performance management, mentoring, customer support, and ensuring timely, high-quality deliverables.

Develop functional models for SoC architectures, write embedded software to validate simulations, improve test automation through scripting, debug models and test cases, and document engineering work. Collaborate with engineers on networking, 5G, AI/ML, and cloud-oriented platforms while gaining experience with processor simulation, ARM architecture, firmware, compilers, and network protocols.

Lead semiconductor ATE test solution development for characterization, production, and wafer sort. Design high-speed test hardware, create test plans, convert simulation patterns to ATE formats, optimize test flows and yields, and release production test programs. Collaborate with design and DFx teams on testability, methodology, and product specifications using Advantest 93K or Teradyne platforms.

Own demand forecasting, supply planning, inventory buffers, wafer starts, assembly loads, and customer on-time delivery for semiconductor products. Collaborate with sales, finance, engineering, marketing, business operations, and external suppliers. Analyze demand and supply data, improve forecast accuracy, manage product transitions, coordinate corrective actions, and oversee vendor and internal project activities.

Support chip power design by learning power estimation methodologies, performing analysis, identifying RTL and physical-design optimizations, developing automation, and exploring AI-based design-flow improvements. Collaborate with architecture, RTL, verification, physical design, and power teams while analyzing trends and presenting findings to the team.

Develops semiconductor test programs on the Advantest 93K platform for characterization, production, and wafer sort. Designs tester hardware for high-speed testing, creates test plans, converts simulation patterns to ATE formats, and leads test-flow optimization, yield improvement, and production releases. Collaborates with design, DFT/DFM, and product engineering teams to ensure chip testability and compliance with customer specifications. Requires extensive ATE experience, programming skills, and semiconductor test expertise.

Lead test strategy, DFT architecture, test-chip validation, silicon bring-up, mixed-signal characterization, and manufacturing test planning for advanced SerDes, chiplet, and die-to-die semiconductor products. Partner with design, validation, product engineering, reliability, and manufacturing teams to improve testability, diagnostics, quality, yield, and production readiness. Mentor engineers and lead complex cross-functional technical initiatives.

Coordinate production issues affecting customer order fulfillment, collaborate with global engineering, test, quality, and other teams, support cross-functional projects, provide management status reports, and maintain subcontractor WIP and inventory reporting in Oracle.