The Role
The Principal Design Engineer will oversee integration and verification of DDR IP subsystems, support silicon bring-up, and resolve complex integration issues while working with global teams.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
- Position Requirements
- M.S. or BTech Electrical/Computer/Electronics Engineering (or similar degree)
- Experience - 7+ years
- sound knowledge of DDR4/5, LPDDR4/5 IP.
- Hands on design/verification experience on DDR protocol
- Exposure to DDR Integration and Verification at SOC Level
- Exposure to Silicon Bring-up/Testing for DDR.
- Hands on design/verification experience on AMBA based protocols like AXI, AHB, APB
- Experience on cadence tools
- Exposure to Lint/CDC, Synthesis, Static Timing Analysis review
- Exposure to all major IC implementation, design, and verification tools.
- Willing to travel to customer sites worldwide.
- Working with global (US, west coast, and east coast) teams, which work in different time-zones.
- Primary Responsibilities:
- Responsible for supporting integration / customization / post silicon bring up of CDNS DDR IP subsystems.
- Analyze and resolve complex subsystem application or implementation issues and provide professional guidance to customers.
- Support DDR Controller and PHY SOC integration reviews, and integration questions.
- Perform RTL and gate level simulations to verify functionality.
- Assist customers with gate level simulations and timing closure.
- Participate in development of CDNS documentations and checklists for customers.
- Support post silicon bring-up and deployment activities by our customers.
- Enhance customer experience by providing prompt updates to customers.
Skills Required
- M.S. or BTech in Electrical/Computer/Electronics Engineering
- 7+ years of experience
- Sound knowledge of DDR4/5, LPDDR4/5 IP
- Hands-on design/verification experience on DDR protocol
- Exposure to DDR Integration and Verification at SOC Level
- Exposure to Silicon Bring-up/Testing for DDR
- Hands-on experience with AMBA based protocols (AXI, AHB, APB)
- Experience with Cadence tools
- Exposure to Lint/CDC, Synthesis, Static Timing Analysis review
- Exposure to major IC implementation, design, and verification tools
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The Company
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
