Physical Design Lead, Bangalore

Eridu India Private Limited, a wholly owned subsidiary of Eridu Corporation, Saratoga, California, USA, is looking to hire highly motivated and talented professionals for its R&D center in Bengaluru to join our world-class team.

Eridu is a Silicon Valley-based hardware startup pioneering infrastructure solutions that accelerate AI data centers to deliver Faster AI. Today’s AI performance is frequently limited by communication bottlenecks. Eridu introduces multiple industry-first innovations across silicon, packaging, software, and systems to deliver an order of magnitude improvement in performance and unlock greater GPU utilization to speed training job completion times and tokens-per-second for more profitable inference. We do this while simultaneously reducing capital and power costs and improving reliability.  

The company’s solutions and value proposition have been widely validated by leading hyperscalers.  

Eridu has raised over $200M to date including its most recent, oversubscribed Series A round. The company is led by a veteran team of Silicon Valley executives who have delivered multiple billion dollar product lines and led multiple companies to billion dollar exits, including serial entrepreneur Drew Perkins, co-founder of Infinera (NASDAQ: INFN), Lightera (acq. by Ciena), Gainspeed (acq. by Nokia) and Mojo Vision (the world’s leading micro-LED company). The company is in execution mode and has a world-class engineering team with decades of experience in state-of-the art silicon, packaging, optics, software, and systems. Eridu is working with best-in-class supply chain partners including silicon, packaging and systems. 

Visit our website eridu.ai to learn more.

Position Overview

We are seeking a hands-on Technical Lead, Physical Design to drive end-to-end implementation of complex SoC designs at advanced process nodes. This role combines deep technical execution with team leadership and cross-functional collaboration.

The ideal candidate is a seasoned physical design expert who has led high-complexity, production tape-outs and can independently drive floorplanning, timing closure, power optimization, and sign-off. In addition to owning critical blocks and chip-level integration, this leader will mentor engineers, establish best practices, and represent physical design in architecture and cross-functional reviews.

This is a high-impact role within Eridu’s silicon organization, supporting next-generation AI infrastructure devices built at advanced nodes (7nm, 5nm, and 3nm-class technologies).

Key Responsibilities

• Lead full-chip and/or large-block physical design execution from netlist to GDSII.
• Own critical aspects of implementation including floorplanning, power grid design, placement, CTS, routing, ECO implementation, timing closure, and physical sign-off.
• Drive PPA (performance, power, area) optimization across complex SoC designs.
• Resolve congestion, IR/EM, multi-voltage domain, and advanced-node design challenges.
• Partner closely with RTL, architecture, STA, DFT, package, and foundry teams to ensure clean handoff and tape-out success.
• Establish and improve physical design methodologies, flows, and automation.
• Mentor and technically guide junior and mid-level physical design engineers.
• Represent the physical design function in design reviews and cross-functional decision forums.
• Coordinate with CAD/EDA vendors to optimize tools and flows where necessary.

Required Qualifications

Education

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related discipline.
• Master’s or Ph.D. strongly preferred.

Experience

• 15+ years of hands-on ASIC/SoC physical design experience.
• Proven record of successful production tape-outs at advanced nodes (7nm, 5nm, and sub-3nm such as N3/N3E/N3P).
• Experience implementing high-complexity SoCs with multi-tens-of-millions of standard cell instances.

Technical Expertise

• Deep understanding of the complete physical design flow:
  floorplanning, power grid architecture, placement, CTS, routing, ECOs, timing closure, and sign-off.
• Strong knowledge of advanced node design challenges including:
• • PPA optimization
  • Power and clock domain management
  • Congestion mitigation
  • IR drop and electromigration
  • Low-power implementation techniques
• Expertise with industry-standard EDA tools such as:
• • Synopsys IC Compiler / Fusion Compiler
  • Cadence Innovus
  • PrimeTime
  • STAR-RCX
  • Calibre
  • Voltus
• Proficiency in scripting and automation (TCL, Python, Perl, Shell).

Preferred Qualifications

• Direct experience with TSMC advanced nodes (N5, N3, N3E, N3P) and associated design rule constraints.
• Experience integrating high-speed IP such as SERDES, UCIe, PCIe, and similar interfaces.
• Familiarity with physical verification flows and debugging complex DRC/LVS/antenna/ERC issues.
• Experience collaborating with foundries and EDA vendors on flow optimization.
• Exposure to AI, networking, or high-performance compute SoCs is a plus.

Leadership Expectations

• Lead by example as a hands-on technical authority.
• Define and communicate physical design best practices across the organization.
• Provide structured mentorship and technical reviews.
• Make sound technical decisions under aggressive schedules.

• Effectively collaborate with geographically distributed teams and external partners.

At Eridu, you’ll have the opportunity to shape the future of AI infrastructure, working with a world-class team on groundbreaking technology that pushes the boundaries of AI performance. Your contributions will directly impact the next generation of AI infrastructure solutions, transforming the performance of AI data centers. 

The starting base salary for the selected candidate will be established based on their relevant skills, experience, qualifications, work location, market trends, and the compensation of employees in comparable roles. 

Notice to Recruiting Agencies

Eridu does not accept unsolicited resumes or candidate profiles from staffing agencies or third-party recruiters. Any candidate submitted to Eridu without prior written authorization from our recruiting team will be considered unsolicited and will become the property of Eridu. Eridu reserves the right to pursue and hire such candidates without any obligation to pay fees. Recruiting agencies are expressly instructed not to contact hiring managers, employees, or executives regarding open positions.