Physical Design Layout Engineer ICE

Posted Yesterday
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Bangalore, Bengaluru Urban, Karnataka, IND
In-Office
Entry level
Artificial Intelligence • Cloud • Information Technology • Software
Creating world-changing technology that enriches the lives of every person on earth.
The Role
Develop and optimize semiconductor physical designs, including cell and block-level layouts, FUB floor plans, abstract views, full-chip assembly, and schematic-to-layout verification. Perform reliability checks, parasitic extraction, debugging, polygon editing, and automated placement and routing. Collaborate across engineering teams to resolve design issues and support methodology, flow development, and verification processes.
Summary Generated by Built In
Job Details:

Job Description: The Role and Impact As a Physical Design Engineer, you will focus on creating and optimizing chip designs at the physical level. You'll be responsible for crafting elements such as cell, block-level semi-custom layouts, FUB-level floor plans, and performing schematic-to-layout verification to ensure design integrity. Your contributions will directly impact the development and execution of complex chip methodologies, enabling Intel to deliver cutting-edge technology to the marketplace. Business group This role is part of Intel's broader semiconductor engineering organization, which is dedicated to designing, developing, and verifying innovative chip technologies. The team focuses on advancing physical design methodologies, ensuring reliability, and optimizing chip performance while supporting Intel's mission to create world-class computing solutions. Key Responsibilities - Develop and refine physical chip designs, including cell and block-level semi-custom layouts, FUB-level floor plans, abstract view generation, and schematic-to-layout verification. - Conduct reliability verification, debug issues, and apply proactive intervention strategies to optimize chip performance. - Utilize parasitic extraction, custom polygon editing, auto-place and route algorithms, floor planning, and full-chip assembly techniques to ensure design success. - Collaborate across teams to troubleshoot complex design challenges and deliver high-quality solutions. - Participate in the execution of project methodologies, flow developments, and verification processes.

Qualifications:Minimum Qualifications - Bachelor's degree in Electronics, Electrical Engineering, or a related field with 0-1 years of hands-on experience in physical design, including skills gained through internships, academic projects, coursework, or hands-on training OR a Master's degree in Electronics, Electrical Engineering, or a related field with no prior professional experience. - Basic understanding of layout design and verification processes. - Familiarity with ICC2 tools. - Proficiency in TCL scripting is a plus. Preferred Qualifications - Strong problem-solving skills and ability to troubleshoot complex design challenges effectively. - Excellent collaboration and communication skills to work across diverse teams. - Demonstrated interest in advancing semiconductor technologies and methodologies. We're excited to see how your skills and passion for innovation can contribute to our cutting-edge team. Take the next step in shaping the future of technology by applying today.

          

Job Type:Intel Contract Employee

Shift:Shift 1 (India)

Primary Location: India, Bangalore

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Skills Required

  • Bachelor's degree in Electronics, Electrical Engineering, or a related field with 0–1 years of hands-on physical design experience, including internships, academic projects, coursework, or training
  • Master's degree in Electronics, Electrical Engineering, or a related field with no prior professional experience
  • Basic understanding of layout design and verification processes
  • Familiarity with ICC2 tools
  • Proficiency in Tcl scripting
  • Strong problem-solving and troubleshooting skills
  • Excellent collaboration and communication skills
  • Interest in semiconductor technologies and methodologies

Intel Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.

  • Leave & Time Off Breadth Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
  • Parental & Family Support Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
  • Healthcare Strength Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.

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The Company
HQ: Santa Clara, CA
75,000 Employees
Year Founded: 1968

What We Do

Our mission is to shape the future of technology to help create a better future for the entire world, that’s the power of Intel Inside. With more ingenuity and creativity inside, our work is at the heart of countless innovations. From major breakthroughs to things that make everyday life better— they’re all powered by Intel technology. With a career at Intel, you can help make the future more wonderful for everyone.

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