Memory Layout Design Engineer

Posted 4 Days Ago
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Hiring Remotely in Electronics City, Bangalore, Karnataka, IND
Remote
Expert/Leader
Software • Semiconductor • Manufacturing
The Role
Design and verify memory layouts for advanced submicron processes, including floor planning, hierarchical layout, chip integration, signal and power routing, and physical verification. Manage schedules, deliverables, process-rule implementation, and technology reviews. Lead teams, train junior engineers, document methodologies, and collaborate with SOC and library teams. Experience with memory architecture, topology, RC requirements, memory compilers, layout automation, and SKILL programming is valued.
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Job Description:

Job Requirements:

- Bachelor's degree with 12 years of experience or a Master's degree with over 10 years of experience.

- Proficiency in using Cadence tools (Virtuoso Layout, Layout XL, Cadence Schematic Capture, and verification tools - Calibre & Hercules).

- Strong layout knowledge in submicron processes (e.g., 7nm, 5nm, 3nm, 2nm).


Key Responsibilities:

- Understand and apply layout guidelines, new process rules, and technical requirements for high-quality layouts.

- Manage scheduling, timelines, and layout floor-planning.

- Ensure end-to-end deliverables are completed with high quality and within the planned schedule.

- Adapt quickly to new methodologies and communicate effectively with the SOC and library teams.


Skill Set(Memory):

- Strong experience in memory layout design and physical verification (LVS, DRC, ERC, Antenna, Electro Migration).

- Experience with Cadence Layout tools (Virtuoso XL, VXL, or EXL) and Calibre verification tools.

- Proficiency in floor-planning, hierarchy layout, and chip integration.

- Solid understanding of memory architecture and RC requirements, with the ability to plan signal and power routing.

- Ability to lead teams, train junior engineers, and manage projects effectively.

- Strong knowledge of memory layout topology; experience with memory compilers is preferred.

- Knowledge of AI, layout automation, and script/SKILL programming is preferred.

- Ability to lead new technology reviews to document layout methodologies, flows, and guidelines.

- Self-reliant with the ability to work both independently and collaboratively.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • Bachelor's degree with 12 years of experience, or Master's degree with over 10 years of experience
  • Proficiency with Cadence Virtuoso Layout, Layout XL, Schematic Capture, and verification tools
  • Experience with Calibre and Hercules verification tools
  • Strong layout knowledge in advanced submicron processes, including 7nm, 5nm, 3nm, or 2nm
  • Strong experience in memory layout design and physical verification, including LVS, DRC, ERC, antenna, and electromigration checks
  • Experience with Virtuoso XL, VXL, or EXL and Calibre verification tools
  • Proficiency in floor planning, hierarchical layout, and chip integration
  • Understanding of memory architecture, RC requirements, signal routing, and power routing
  • Ability to lead teams, train junior engineers, and manage projects
  • Strong knowledge of memory layout topology
  • Experience with memory compilers
  • Knowledge of AI, layout automation, and SKILL programming
  • Ability to lead new technology reviews and document layout methodologies, flows, and guidelines
  • Ability to work independently and collaboratively

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility — Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
  • Retirement Support — A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
  • Pay Growth & Progression — Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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