Lead Product Engineer

Posted One Month Ago
Be an Early Applicant
San Jose, San José, CRI
In-Office
115K-213K Annually
Senior level
Artificial Intelligence • Cloud • Hardware • Software • Semiconductor
The Role
Drive new Design For Test and ATPG product features, develop specifications and prototypes, and collaborate with R&D and validation teams. Support customer and field deployments through flow development, presentations, and hands-on debugging. Apply expertise in scan, JTAG, iJTAG, MBIST, LBIST, DFT tools, and VLSI domains while engaging stakeholders across teams.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems is looking for a highly motivated engineer to work with the Modus Test Product Engineering team working on Design For Test (DFT) and Automatic Test Pattern Generation (ATPG).

What You'll Be Doing

  • Be part of a team that is going to help drive new product features in DFT & ATPG
  • Develop product spec, prototype and work closely with R&D & Product Validation teams in implementation & validation of such features
  • Work with field team and customers in helping deploy Modus by developing flows, presentations & hands-on debug

What We Need To See

  • BS (or equivalent experience) with 6+ years or MS with 4+ years of direct experience in DFT either in EDA, CAD or design implementation
  • Solid understanding of ATPG, Scan, JTAG, IEEE 1687 (iJTAG), MBIST & LBIST
  • Need to be aware of latest technologies & innovations in DFT both in EDA and implementation
  • Experience in  STA, Physical Design, Silicon bringup related to DFT is a plus
  • Flexibility/adaptability for working in a highly dynamic environment and engaging with key stakeholders across various teams within and outside of Cadence
  • Excellent communication, interpersonal and customer collaboration skills

Ways To Stand Out From The Crowd

  • Broad knowledge of DFT domain & how DFT interacts with various other VLSI domains
  • Hands-on experience with DFT EDA tools in the industry

The annual salary range for California is $114,800 to $213,200. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

We’re doing work that matters. Help us solve what others can’t.

Skills Required

  • Bachelor’s degree or equivalent experience with 6+ years of direct DFT experience, or master’s degree with 4+ years of direct DFT experience
  • Experience in DFT within EDA, CAD, or design implementation
  • Solid understanding of ATPG, Scan, JTAG, IEEE 1687 (iJTAG), MBIST, and LBIST
  • Awareness of current DFT technologies and innovations in EDA and implementation
  • Flexibility and adaptability in a dynamic environment
  • Excellent communication, interpersonal, and customer collaboration skills
  • Experience with STA, physical design, or silicon bring-up related to DFT
  • Broad knowledge of the DFT domain and its interaction with other VLSI domains
  • Hands-on experience with industry DFT EDA tools

Cadence Design Systems Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.

  • Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
  • Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
  • Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.

Cadence Design Systems Insights

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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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