Lead Analog Design Engineer

Reposted 21 Days Ago
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2 Locations
In-Office
Expert/Leader
Cloud • Hardware • Software • Semiconductor
The Role
The Lead Analog Design Engineer is responsible for designing high-speed transceiver elements, guiding junior engineers, and developing methodologies for future technologies in a dynamic IP design team environment.
Summary Generated by Built In
At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Principal Analog Design Engineer

Job Summary

This role could be based in Shanghai or Nanjing and recognized as an analog design expert, demonstrating substantial development & business impact by providing analog expertise across multiple projects/programs; helps team build flows/methodology for current design and future new technologies and products, contributes to design innovation, implementation, review and provide technical guidance for junior and middle level engineers in projects together.

What You’ll Do

  • Responsible for design, layout, verification, and characterization of high-speed transceiver elements, such as TIAs, limiting amplifiers, I/Os, equalizers, high-speed CML, and other SerDes/CDR/PLL building blocks at data rates of 10Gb/s and above.
  • You will work as a part of an IP design team in a dynamic environment, taking an active role in design reviews, contributing to product definition, proposing and evaluating technical solutions, writing design specifications and test requirement documents, etc.
  • The ideal candidate is a hands-on self-starter who is able to develop design specifications based on input from colleagues, customers, and industry standards, and who can effectively manage his or her own time to take projects to completion under supervision and guidance.

What we need to see/Who You Are

  • 10+ years of working/research experience in high-speed CMOS SerDes design (CTLEs, TIAs, PLLs, DFEs, Drivers, FFEs, etc.), M.S in Electrical Engineering or related areas, Ph.D. is a plus
  • Have experience designing in advanced CMOS technologies (7nm or below) at data rates of at least 10Gb/s and/or RF circuits operating at 5GHz or above
  • Proficient with Cadence design environment and mixed-signal simulation (ADE, Layout, AMS), mixed-signal simulation (AMS), EM simulation (such as EMX)
  • Good understanding of high-speed layout considerations, such as parasitics, crosstalk isolation, supply and bias distribution, etc.
  • Working knowledge of theoretical and practical aspects of electro-magnetic structures including transmission lines, spiral inductors, resonant circuits, etc. (HFSS experience is a plus)
  • Experience with precision analog and mixed-signal circuits is a plus
  • Able to assume responsibility for a variety of technical tasks and to work independently
  • Able to be hands-on at all levels of design, with the ability to verify, test, and characterize own designs
  • Good communication and presentation skills
  • Familiar with one of USB, DP, PCIe, UCIe, Ethernet, MIPI, HDMI, CXL, UALink or other industry standards. Multiple is a strong plus

We’re doing work that matters. Help us solve what others can’t.

We’re doing work that matters. Help us solve what others can’t.

Top Skills

Cadence Design Environment
Em Simulation
Hfss
Mixed-Signal Simulation
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The Company
HQ: San Jose, CA
8,216 Employees
Year Founded: 1988

What We Do

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.

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