IO and Mixed Signal Layout Design Engineer

Posted 2 Days Ago
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Hiring Remotely in Electronics City, Bangalore, Karnataka, IND
Remote
Expert/Leader
Software • Semiconductor • Manufacturing
The Role
Design and verify full-custom I/O library and analog mixed-signal IP layouts across planar and FinFET technologies. Responsibilities include floor planning, placement and routing, full-chip and I/O planning, ESD and latch-up considerations, layout verification, debugging, and end-to-end delivery. The role requires collaboration across teams, project leadership, mentoring junior engineers, and familiarity with physical design flows, automation, and scripting.
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Job Description:

  • Design full custom layouts of I/O libraries and Analog Mixed Signal IP's in planar and FinFET technologies.

  • Drive critical floor-planning decisions to ensure optimal placement and routing that meets design requirements and performance metric.

  • Perform comprehensive layout verification to ensure high quality and compliance

  • Complete ownership from end to end deliverables with quality within the schedule.

  • Adapt quickly to new methodologies, remain open to new ideas, and communicate effectively with the teams across all sites.

Skills and Qualifications Required:

  • B.Tech/M.Tech in Electronics/Electrical engineering with 8-12 years of experience

  • Hands-on experience in I/O Library and Analog Mixed-signal IP development and verification 

  • Solid understanding of Planar and FinFET layouts and process technology

  • Good understanding of Full-chip concepts, IO frame and pitch requirements, power planning, IO segment rules and requirements

  • In-Depth knowledge of ESD and Latch-up principles for I/O and Analog layouts

  • Proficiency in using Cadence Virtuoso Layout suite and Siemens CALIBRE verification tools.

  • Expertise in Layout verifications and debugging: DRC/LVS/ANT/ERC/DFM, LPE, PERC, EM and IR etc

  • Familiar with the Physical Design flow: LEF generation and PnR

  • Knowledge of AI, automation in layout, Script Programming and SKILL Programming is a plus.

  • Excellent written and verbal communication skills to collaborate with circuit designers and teams across all sites

  • Able to lead, train junior engineers, and manage projects effectively.

  • Self-motivated, capable of working independently, and a strong collaborative team player.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • B.Tech or M.Tech degree in Electronics or Electrical Engineering
  • 8–12 years of relevant engineering experience
  • Hands-on experience developing and verifying I/O libraries and analog mixed-signal IP
  • Understanding of planar and FinFET layouts and process technology
  • Understanding of full-chip concepts, I/O frames, pitch requirements, power planning, and I/O segment rules
  • In-depth knowledge of ESD and latch-up principles for I/O and analog layouts
  • Proficiency with Cadence Virtuoso Layout Suite and Siemens Calibre verification tools
  • Expertise in DRC, LVS, ANT, ERC, DFM, LPE, PERC, EM, and IR verification and debugging
  • Familiarity with LEF generation and place-and-route physical design flows
  • Excellent written and verbal communication skills
  • Ability to lead, train junior engineers, and manage projects
  • Knowledge of AI, layout automation, script programming, and SKILL programming
  • Ability to work independently and collaboratively

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
  • Retirement Support A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
  • Pay Growth & Progression Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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