IO and Mixed Signal Layout Design Engineer

Posted 3 Days Ago
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Hiring Remotely in Electronics City, Bangalore, Karnataka, IND
Remote
Senior level
Software • Semiconductor • Manufacturing
The Role
Design full-custom I/O and analog mixed-signal layouts in planar and FinFET technologies, own end-to-end deliverables, drive floorplanning and power/IO planning, perform comprehensive layout verification (DRC/LVS/ANT/ERC/DFM, extraction, EM/IR), debug layouts, and lead/train junior engineers while coordinating across sites.
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Job Description:

  • Design full custom layouts of I/O libraries and Analog Mixed Signal IP's in planar and FinFET technologies.

  • Drive critical floor-planning decisions to ensure optimal placement and routing that meets design requirements and performance metric.

  • Perform comprehensive layout verification to ensure high quality and compliance

  • Complete ownership from end to end deliverables with quality within the schedule.

  • Adapt quickly to new methodologies, remain open to new ideas, and communicate effectively with the teams across all sites.

Skills and Qualifications Required:

  • B.Tech/M.Tech in Electronics/Electrical engineering with 8-12 years of experience

  • Hands-on experience in I/O Library and Analog Mixed-signal IP development and verification 

  • Solid understanding of Planar and FinFET layouts and process technology

  • Good understanding of Full-chip concepts, IO frame and pitch requirements, power planning, IO segment rules and requirements

  • In-Depth knowledge of ESD and Latch-up principles for I/O and Analog layouts

  • Proficiency in using Cadence Virtuoso Layout suite and Siemens CALIBRE verification tools.

  • Expertise in Layout verifications and debugging: DRC/LVS/ANT/ERC/DFM, LPE, PERC, EM and IR etc

  • Familiar with the Physical Design flow: LEF generation and PnR

  • Knowledge of AI, automation in layout, Script Programming and SKILL Programming is a plus.

  • Excellent written and verbal communication skills to collaborate with circuit designers and teams across all sites

  • Able to lead, train junior engineers, and manage projects effectively.

  • Self-motivated, capable of working independently, and a strong collaborative team player.

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • B.Tech/M.Tech in Electronics/Electrical engineering with 8-12 years of experience
  • Hands-on experience in I/O Library and Analog Mixed-signal IP development and verification
  • Solid understanding of Planar and FinFET layouts and process technology
  • Good understanding of full-chip concepts, IO frame and pitch requirements, power planning, IO segment rules
  • In-depth knowledge of ESD and Latch-up principles for I/O and Analog layouts
  • Proficiency in Cadence Virtuoso Layout suite and Siemens CALIBRE verification tools
  • Expertise in layout verification and debugging: DRC/LVS/ANT/ERC/DFM, LPE, PERC, EM and IR
  • Familiarity with physical design flow: LEF generation and place-and-route (PnR)
  • Knowledge of AI, automation in layout, script programming and SKILL programming
  • Excellent written and verbal communication skills for cross-site collaboration
  • Ability to lead, train junior engineers, and manage projects effectively
  • Self-motivated, able to work independently and collaboratively

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility Equity is used broadly through RSUs with quarterly or annual vesting, and an ESPP with a discount and look‑back that can add meaningful upside. Company disclosures show ongoing equity grants, including inducement RSUs tied to acquisitions, underscoring equity’s central role in total rewards.
  • Retirement Support A 401(k) plan with a competitive company match and immediate vesting is consistently highlighted, supporting long‑term savings. Tax‑advantaged accounts like HSA/FSA further strengthen the financial wellness toolkit.
  • Pay Growth & Progression Compensation ceilings in technical tracks are described as high, with wide ranges and very strong totals for experienced engineers. Sales compensation is also characterized as competitive, supporting attractive on‑target earnings.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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