Graduate Talent (CPU Design Verification)

Reposted 19 Hours Ago
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Penang, Daerah Timor Laut, Penang, MYS
In-Office
Entry level
Artificial Intelligence • Cloud • Information Technology • Software
Creating world-changing technology that enriches the lives of every person on earth.
The Role
Perform functional validation of next-generation CPU designs (simulation, emulation, FPGA, platform). Validate DFx features, develop test plans and test content/tools, debug RTL logic bugs to root cause, and develop post-silicon software solutions and tooling support.
Summary Generated by Built In
Job Details:

Job Description: 

As today's Intel processor technology progresses into new market segments, the CPU IP team is tasked to meet these new challenges by ensuring the processor designs meet or exceed the quality goals in the most efficient ways possible. As an CPU Design Verification Graduate Talent, you will be part of the validation team performing functional validation (in simulation, emulation, FPGA or actual platform) on Intel's next generation CPU designs in close partnership with the architecture group and project design teams.
Main responsibilities for this position:

  • Validate and verify DFx (Design-For-X) features of next generation CPU

  • Knowing in-depth the DFx architecture/designs to develop test plans

  • Develop new test content and/or test tools as needed

  • Identify RTL logic bugs and debug accordingly (individually or as a team) all test failures in simulation/emulation/FPGA to root cause and fix

  • Develop software solution based on CPU DFx for post silicon usages, and provide tool support to users as needed

Qualifications:

You must possess a minimum of Bachelor Degree in Electrical/Electronics Engineering or Computer Engineering. Following additional skillsets will be a big plus:

  • Knowledge of Computer System Architecture

  • Knowledge in digital logic design, pre-silicon or post-silicon validation

  • Experience in tools and methodologies for pre-silicon verification/logic design including but not limited to: System Verilog, Python/PERL/C/C++ programming, Synopsys simulator

  • Strong analyzing and debugging skill, creative in problem solving

          

Job Type:Intel Contract Employee

Shift:Shift 1 (Malaysia)

Primary Location: Malaysia, Penang

Additional Locations:

Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/A

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Skills Required

  • Bachelor Degree in Electrical/Electronics Engineering or Computer Engineering
  • Knowledge of Computer System Architecture
  • Knowledge in digital logic design, pre-silicon or post-silicon validation
  • Experience with System Verilog, Python, PERL, C, C++, Synopsys simulator
  • Strong analyzing and debugging skills; creative problem solving

Intel Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Intel and has not been reviewed or approved by Intel.

  • Leave & Time Off Breadth Sabbaticals and paid time off are highlighted as signature elements, with an established program offering four weeks after four years or eight weeks after seven years. This distinctive time off is positioned as a meaningful part of the overall package.
  • Parental & Family Support Paid bonding leave of 12 weeks and a New Parent Reintegration program, plus fertility benefits around $40,000 and up to $15,000 adoption reimbursement with no lifetime cap, are clearly stated. These programs are presented as standout components alongside broader family support resources.
  • Healthcare Strength Multiple medical plan options with 2026 updates, a shift to Spring Health for EAP, and in‑network virtual medical visits covered at 100% beginning in 2026 indicate a comprehensive offering. These features signal an emphasis on robust medical access and mental health support.

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The Company
HQ: Santa Clara, CA
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Year Founded: 1968

What We Do

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