Altera is a leader in FPGA innovation, delivering programmable solutions that power AI, cloud computing, networking, and edge applications. Our compiler and tools teams are at the core of enabling customers to efficiently map complex designs to cutting-edge FPGA architectures.
Position Overview
Altera is seeking a FPGA Compiler Engineer (Routing) to join our team! This role focuses on the development and optimization of FPGA routing algorithms within the compiler toolchain, directly impacting performance, power, and usability of next-generation FPGA devices.
The ideal candidate brings strong expertise in EDA algorithms, graph-based optimization, and FPGA/ASIC design flows, along with a passion for solving complex problems at scale.
Key Responsibilities
Routing Algorithm Development:
Design, implement, and optimize FPGA routing algorithms to improve performance, routability, and timing closure.Compiler Enhancement:
Contribute to the FPGA compiler flow, including placement, routing, and timing-driven optimization.Performance Optimization:
Analyze and improve runtime, memory efficiency, and scalability of routing algorithms for large designs.Cross-Functional Collaboration:
Work closely with architecture, synthesis, timing (STA), and hardware teams to align routing strategies with device capabilities.Debug & Analysis:
Investigate routing congestion, timing violations, and design bottlenecks; develop solutions to improve convergence.Toolchain Integration:
Integrate routing features into existing compiler infrastructure and ensure robustness across diverse customer use cases.
Our compensation is designed to reflect the Canadian labour market. The actual salary offered may vary based on several factors, including the position’s location, as well as the candidate’s experience, skills, training, and job-specific knowledge. In addition to base salary, we offer performance-based incentive opportunities that reward both individual contributions and overall company success.
Estimated Salary Range: $110K – $115K CAD
We use artificial intelligence to screen, assess, or select applicants for the position. This posting is for an existing vacancy. Canadian work experience is not required for this role. Applicants must be eligible for any required Canada export authorizations.
Experience:
1+ years of experience in FPGA/ASIC design tools, EDA, or related fields.
Technical Expertise:
Strong background in algorithms and data structures (graph algorithms, optimization techniques)
Experience with FPGA or ASIC design flows (placement, routing, timing closure)
Proficiency in C/C++ and software development best practices
EDA / CAD Knowledge:
Familiarity with:
Routing algorithms (e.g., maze routing, negotiated congestion)
Timing-driven design methodologies
Physical design concepts
Problem Solving:
Ability to analyze complex systems and develop scalable, high-performance solutions.
Education:
Bachelor’s Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
Strong communication, teamwork, and interpersonal skills are essential to effectively collaborate across cross-functional teams and drive successful outcomes.
Preferred Qualifications
Experience with commercial FPGA toolchains (e.g., Quartus, Vivado)
Knowledge of FPGA architectures and interconnect fabrics
Familiarity with parallel/distributed computing for EDA workloads
Experience with scripting (Python, Tcl) for tooling and automation
Background in timing analysis or placement algorithms
Skills Required
- 1+ years experience in FPGA/ASIC design tools, EDA, or related fields
- Strong background in algorithms and data structures (graph algorithms, optimization techniques)
- Experience with FPGA or ASIC design flows (placement, routing, timing closure)
- Proficiency in C/C++ and software development best practices
- Familiarity with routing algorithms (e.g., maze routing, negotiated congestion)
- Familiarity with timing-driven design methodologies and physical design concepts
- Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
- Strong communication, teamwork, and interpersonal skills
- Experience with commercial FPGA toolchains (e.g., Quartus, Vivado)
- Knowledge of FPGA architectures and interconnect fabrics
- Familiarity with parallel/distributed computing for EDA workloads
- Experience with scripting for tooling and automation (Python, Tcl)
- Background in timing analysis or placement algorithms
Altera (altera.com) Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Altera (altera.com) and has not been reviewed or approved by Altera (altera.com).
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Retirement Support — Feedback suggests retirement programs are robust, with offerings such as a 401(k) and a pension. This breadth supports long-term financial security.
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Leave & Time Off Breadth — Feedback suggests time-off policies are generous, including PTO, paid sick days, and paid holidays. Wellness initiatives like gym memberships further support balance.
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Parental & Family Support — Feedback suggests parental leave is generous. Family-building support, including fertility benefits and adoption reimbursement, is highlighted as part of the package.
Altera (altera.com) Insights
What We Do
Altera: Accelerating Innovators Altera provides leadership programmable solutions that are easy-to-use and deploy in applications from cloud to edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation. Altera is helping to shape the future through pioneering innovation that unlocks extraordinary possibilities for everyone on the planet.
