- Design and implement PAD/PFC logic for SoC products, including pin multiplexing, boundary scan, test functions, and I/O control logic using in-house PAD design tools and methodologies.
- Implement PAD logic based on design specifications, pinmux definitions, PAD-RTL/PAD-IO requirements, and integration guidelines.
- Generate, integrate, and validate PAD logic using in-house tools (e.g., PGA, SCAAPII), ensuring consistency between specifications and generated design outputs.
- Analyze and resolve design issues identified by RTL lint, CDC, synthesis, timing, and formal verification tools.
- Develop automation scripts using Python and Tcl to improve design productivity and flow efficiency.
- Review verification, formal verification, and signoff results to ensure design quality and completeness.
- Collaborate with verification, DFT, STA, backend, and architecture teams throughout the design lifecycle.
- Support PAD integration, signoff activities, and continuous improvement of PAD design methodologies and environments.
Job Requirement:
- Strong RTL design experience using Verilog/SystemVerilog.
- Understanding of digital design fundamentals, pin multiplexing, and I/O control logic.
- Good Python scripting skills; Tcl knowledge is a plus.
- Experience with SpyGlass Lint & CDC, synthesis (Genus/DC), and timing analysis tools (PrimeTime)
- Knowledge of formal verification (JG-CONN/JG-CSV/JG-FPV) is an advantage.
- Basic understanding of DFT, boundary scan, and backend implementation is a plus.
- Strong self-learning capability and ability to work with in-house design tools.
- Agile problem-solving, transparent communication, and strong collaboration skills.
- Ownership mindset with a focus on design quality and continuous improvement.
Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.
At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.
We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.
Are you ready to join our team and shape the future with us?
Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.
Skills Required
- Strong RTL design experience using Verilog and SystemVerilog
- Understanding of digital design fundamentals, pin multiplexing, and I/O control logic
- Good Python scripting skills
- Experience with SpyGlass Lint and CDC
- Experience with synthesis tools such as Genus or Design Compiler
- Experience with timing analysis tools such as PrimeTime
- Tcl knowledge
- Knowledge of formal verification tools including JG-CONN, JG-CSV, or JG-FPV
- Basic understanding of DFT, boundary scan, and backend implementation
- Strong self-learning, problem-solving, communication, collaboration, and ownership skills
Renesas Electronics Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Renesas Electronics and has not been reviewed or approved by Renesas Electronics.
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Fair & Transparent Compensation — Feedback suggests pay is generally fair-to-good across many roles, with base pay aligned to prevailing market levels in multiple U.S. locations. Engineering and leadership tracks can be competitive on total compensation, reinforcing a sense that pay can meet market expectations in key job families.
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Healthcare Strength — Feedback suggests core medical, dental, and vision coverage is solid and well-regarded by employees. Day-one eligibility in U.S. roles is described, supporting confidence in access and continuity of care.
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Leave & Time Off Breadth — Feedback suggests PTO, paid holidays, sick time, and parental leave provide a comprehensive time-off framework. Company initiatives like Renesas Day and meeting-light Focus Fridays further support time away and balance.
Renesas Electronics Insights
What We Do
We're the world's leading semiconductor manufacturer. Our mission is to make our lives easier and a world that's safer, healthier, greener, and smarter.
