Digital Twin & Hardware Emulation Project Lead

Amentum is a trusted partner to United States government agencies, allied governments, and corporations worldwide supporting critical programs across a broad range of domains. We are seeking a Digital Twin & Hardware Emulation Project Lead to support the emulation of microelectronics and microelectronics systems at the Naval Surface Warfare Center, Crane Division. *This position is a typical 40-hour work week with very rare overtime requirements. A 9/80 (80 hours over 9 days) work schedule is also an option with every other Friday off.

Job Duties and Responsibilities:

• Support the establishment of a digital engineering (DE)/emulation capability at NSWC Crane, providing oversight to an external contractor on developing a digital twin, keeping the NSWC Crane team updated on all developments.
• Achieve defined goals of the DE capability with one or more of the following:
  • Use DE/emulation to evaluate higher level of abstraction design simulations to assist in architectural evaluations/choices at beginning of ASIC design
  • Use DE/emulation to help take an existing board level system facing obsolescence issues and bring into DE environment to design drop-in replacements
  • Import existing ASIC technical data package into DE/emulation environment for software bring up and mission scenario simulations
• Utilize subject matter expertise to assist in the development of the following:
  • A strategy for investing in DE/emulation hardware, software, workforce over the next five years to codify the goals above
  • Roadmap for the next 2 years to achieve strategy
  • Roadmap for the next 5 years to achieve strategy

Required Qualifications:

• Bachelor’s degree in electrical engineering or related Physical Science and 15+ years of relevant experience.
• Experience with Microelectronics emulation with at least one piece of current EDA vendor emulation equipment (Cadence Palladium (preferred), Siemens Veloce, Synopsys ZeBu)
• Microelectronics board/system level design/simulation familiarity
  • Schematics and block diagrams
  • BOMs and Gerber files
• Microelectronics component level design/simulation familiarity
  • RTL design, logic simulations
  • PDKs and SPICE models
  • TLM/system C modeling (Synopsys Platform Architect experience is a bonus)
• Emulation Project familiarity
  • Have modeled/simulated microelectronics for a project in DE environment
  • Have modeled/simulated a microelectronics-based system for a project in DE environment
• Strategic high-level thinking
• Ability/experience with planning an initiative involving hardware/software/workforce
• Must be able to obtain and maintain a US Government Secret Clearance. An US Government Interim Secret Clearance is required prior to starting. Please note that US Citizenship is required to obtain a Secret Clearance.
• Will require occasional travel to NSWC Crane

Preferred Qualifications

• Active Secret Clearance
• Graduate degree
• Combination of Digital ASIC/FPGA design/verification AND higher level DE/emulation experience and strategic high-level planning

Amentum is proud to be an Equal Opportunity Employer. Our hiring practices provide equal opportunity for employment without regard to race, religion, color, sex, gender, national origin, age, United States military veteran’s status, ancestry, sexual orientation, marital status, family structure, medical condition including genetic characteristics or information, veteran status, or mental or physical disability so long as the essential functions of the job can be performed with or without reasonable accommodation, or any other protected category under federal, state, or local law.

Labor Law Posters

EEO including Disability/Protected Veterans