Efficient is developing the world’s most energy-efficient general-purpose computer processor. Efficient’s patented technology uses 100x less energy than state of the art commercially available ultra-low-power processors and is programmable using standard high-level programming languages and AI/ML frameworks. This level of efficiency makes perpetual, pervasive intelligence possible: run AI/ML continuously on a AA battery for 5-10 years. Our platform’s unprecedented level of efficiency enables IoT devices to intelligently capture and curate first-party data to drive the next major computing revolution
Efficient is seeking a Digital Design Engineer to join our growing team. The Digital Design Engineer will contribute to the design, implementation, and verification of the world’s most energy-efficient, general-purpose processor. This position is a unique opportunity to realize our product, work as a digital hardware designer with a highly interdisciplinary team, and help shape the future of Efficient’s technology.
We’re currently looking for someone who’s experienced in measuring and reducing power draw from the "front end" of designs. The role would focus on understanding chip power, maintaining that flow, and recommending/implementing design changes to cut down on energy consumption.
Key Responsibilities
- Design, implement, and verify features from specification through synthesis
- Measure, analyze, and optimize power consumption in digital designs from the front-end perspective, using industry-standard tools Measure, analyze, and optimize power consumption in digital designs from the front-end perspective, using industry-standard tools.
- Implement product features at the RTL-level targeting silicon implementation
- Implement product features at the RTL-level targeting FPGA emulation for verification
- Build unit testbench infrastructure to verify implemented features
- Design of memory systems and digital integration of memory macros, including SRAM, MRAM, and others
- Interface design components with external/vendor-provided IP
- Use industrial-strength digital design tools from RTL simulation through synthesis, which may include Cadence, Synopsys, Mentor/Siemens EDA, and ANSYS as necessary
- Provide comprehensive feature and integration documentation
- Interact with physical design and digital verification team for pre-silicon verification
- Work with physical design team to resolve RTL-level issues leading to DRC violations
- Work with compiler and embedded software teams to develop, document, and implement features that span across the software-hardware boundary, including Efficient’s dataflow ISA
Required Qualifications & Experience Requirements
- 8+ years of post-graduate digital design experience with substantial experience designing for tape-out
- Bachelor’s degree in related field required (Electrical Engineering, Electronics Engineering, Computer Science, Integrated Circuits). Master’s or PhD. preferred.
- Experience using PowerArtist/PTPX/Primepower
- Experience running a digital design flow using industry-strength digital design and EDA tools
- Experience with designing and implementing features in RTL
- Experience integrating digital IP with RTL-level implementations
- Experience with pre-silicon verification
- Experience with continuous integration and testing of digital designs
- Experience with version control and scripting languages (Python preferred)
- Experience with memory compiler toolchains
- Strong attention to detail, good work ethic, ability to work on multiple projects simultaneously, and good communication skills
- Good problem solving skills
Desired Qualifications & Experience Requirements
- Experience designing compilers
- Knowledge of computer architecture
- Knowledge of physical design and ASIC implementation
- Experience with power and energy modeling (using tools like PowerArtist, Joules, etc.)
- Bachelor’s degree in related field required. Master’s or PhD. preferred.
We offer a competitive salary for this role, generally ranging from $160,000 to $210,000, along with meaningful equity and comprehensive benefits. The final compensation package will be based on your experience and location, with some flexibility to ensure we align with the right candidate.
Why Join Efficient?
Efficient offers a competitive compensation and benefits package, including 401K match, company-paid benefits, equity program, paid parental leave, and flexibility. We are committed to personal and professional development and strive to grow together as people and as a company.
Top Skills
What We Do
Efficient is building the world’s most energy-efficient general-purpose processor by combining ultra-efficient hardware with an intuitive, developer-friendly compiler and software stack that unlocks 10–100× efficiency gains across every part of an application, including AI. Efficient was founded in 2022 to commercialize a breakthrough in efficient computation developed over nearly a decade by a team of world-leading computer architects. Efficient's world-class team has produced two silicon implementations of the Fabric architecture: the Electron E0, a prototype system-on-chip, and the Electron E1, the first silicon product. With Efficient's cutting-edge effcc Compiler and software stack, the Electron E1 processor has been delivered to customers as of mid-2025, ramping to large-scale volume and distribution in 2026. Efficient already has customer traction in areas such as physical AI for infrastructure and automation, space and defense, automotive, and consumer products. Efficient's technology scales from tiny “beyond the edge” devices to large-scale robotics, autonomy, edge cloud, and datacenter applications—enabling widespread adoption across multiple industries and positioning Efficient as the solution to the energy problem across all of computing.
