The Marketing Intern will create visual assets for marketing, assist with brand consistency, support social media content creation, and manage design files. They will collaborate with the marketing team to translate messaging into visual designs and incorporate feedback for revisions.

Design and optimize applications for an energy-efficient processor. Collaborate with the compiler team on performance analysis and application deployment.

Own and scale hardware-design and software build/CI infrastructure: manage PDKs, EDA tools and license servers, integrate third-party IP, maintain reproducible ASIC flows and CAD environments, run CI pipelines, manage compute and containerized dev environments, and support compiler/runtime teams to improve tooling uptime and onboarding.

Lead chip-level power architecture from strategy through silicon sign-off: define domains, DVFS, UPF, power delivery, perform power/IR/EM analysis, drive power-aware flows, verify power intent, correlate pre/post-silicon, and mentor teams to meet aggressive power targets.

Own emulation strategy and execution for pre-silicon verification: platform selection, RTL partitioning/synthesis, emulation bring-up, system-level validation, debug workflows, CI automation, and cross-functional support for software and silicon teams to ensure successful silicon bring-up.

Lead and scale verification and emulation organization: define end-to-end DV strategy, drive UVM-based methodology and emulation for early software enablement, deliver pre-silicon platforms, manage emulation lab and vendor relationships, hire and mentor a team, and ensure tapeout verification closure.