What we are looking for :
Minimum Qualifications:
• 2-10 years (with Btech) or 8 years (with Mtech) experience in Post-Silicon PHY, Systems Interop and Compliance testing.
• 2-3 years of management experience leading/mentoring a small team of engineers
• Physical Layer and Protocol layer experience on AT LEAST ONE High speed SERDES on PCIe/CXL/UCIe/Ethernet.
• Debug skills and Experience in using lab equipment such as Oscilloscopes, Bit Error Rate Testers, Protocol Exercisers, Analyzers.
Preferred Qualifications:
• Experience leading System testing efforts for SERDES solutions.
• Experience in PCIe/UCIe LTSSM states is a plus.
• 1-2 years of experience in FPGA Design and Schematic design.
• 1-2 years of IP/SoC Physical Layer Electrical Validation experience is a plus.
• Familiarity with Verilog RTL coding for FPGA, python,C/C++
• Good communication skills
We’re doing work that matters. Help us solve what others can’t.Skills Required
- 2-10 years (BTech) or 8 years (MTech) experience in Post-Silicon PHY, Systems Interop, and Compliance testing
- 2-3 years management experience leading/mentoring a small team of engineers
- Physical Layer and Protocol layer experience on at least one high-speed SERDES (PCIe/CXL/UCIe/Ethernet)
- Debug skills and experience using lab equipment (oscilloscopes, BERTs, protocol exercisers, protocol analyzers)
- Experience leading system testing efforts for SERDES solutions
- Experience with PCIe/UCIe LTSSM states
- 1-2 years of FPGA design and schematic design experience
- 1-2 years of IP/SoC physical layer electrical validation experience
- Familiarity with Verilog RTL for FPGA, Python, C/C++
- Good communication skills
Cadence Design Systems Compensation & Benefits Highlights
The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Cadence Design Systems and has not been reviewed or approved by Cadence Design Systems.
-
Equity Value & Accessibility — A discounted ESPP with a lookback feature and equity included in total compensation make ownership broadly accessible and potentially meaningful. Structured compensation at an industry leader adds predictability to equity participation.
-
Healthcare Strength — Medical, dental, and vision coverage are described as solid, with mental‑health/EAP and fertility support enhancing the offering. The breadth across core care and family‑building needs strengthens the healthcare package.
-
Leave & Time Off Breadth — Global Recharge Days, volunteer time off, and companywide breaks indicate a comprehensive time‑off framework. In addition, many salaried roles are described as having flexible or generous PTO policies.
Cadence Design Systems Insights
What We Do
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company's Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For.
