CAD Engineering Intern

Posted 2 Days Ago
Be an Early Applicant
San Jose, CA, USA
Hybrid
26-48 Hourly
Internship
Big Data • Internet of Things • Software
The Role
Develop and enhance CAD methodologies, EDA automation flows, and engineering utilities for digital ASIC design, verification, and implementation. Build Python, Tcl, and shell-based tools, analyze design results, and explore AI-enabled solutions using LLMs, RAG, and AI agents. Collaborate with CAD, design, verification, and physical design teams while gaining exposure to synthesis, timing, power analysis, place and route, and physical verification workflows.
Summary Generated by Built In
Overview

Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional CAD Engineering Intern to join our Central CAD team in San Jose, California. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer.


As a CAD Engineering Intern, you’ll play a pivotal role in developing automated methodology for chip and silicon IP design. In this role, you’ll report directly to our Director of CAD. Our CAD Team is dedicated to delivering EDA infrastructure, design methodologies, and automation solutions that enable high-performance semiconductor products, including memory interface chips, interconnect solutions, and silicon IP, and your contributions will be instrumental in developing CAD tools, flows, and methodologies for a global design organization.


Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.

Responsibilities
  • Develop, maintain, and enhance CAD methodologies and automation flows supporting digital
  • ASIC design, verification and implementation.
  • Work with industry-standard EDA tools across formal verification, synthesis, static timing analysis
  • (STA), power analysis to improve design quality, productivity, and flow efficiency.
  • Develop Python, Tcl, and shell-based scripts and utilities to automate design workflows, analyze
  • results, and streamline engineering processes.
  • Explore and develop AI-assisted solutions to address practical challenges in CAD and
  • semiconductor design workflows, including engineering data analysis, debugging, and workflow
  •  
  • Investigate and deploy applications of large language models (LLMs), retrieval-augmented
  • generation (RAG), and AI agents for engineering automation and intelligent workflow assistance.
  • Build and integrate AI-enabled utilities with existing engineering tools and workflows, assessing
  • their accuracy, reliability, performance, and practical effectiveness.
  • Collaborate with cross-functional CAD, design, verification, and physical design teams to
  • understand engineering challenges, translate requirements into technical solutions, and validate
  •  
  • Gain exposure to broader physical design and signoff methodologies, including place and route
  • (P&R), physical verification (DRC/LVS), and related implementation flows.
  •  
Qualifications
  • Currently pursuing a Bachelor’s, Master’s, or Ph.D. degree in Electrical Engineering, Computer
  • Engineering, Computer Science, or a related field.
  • Understanding of digital logic design, RTL, and ASIC/SoC design fundamentals.
  • Familiarity with digital implementation methodology, such as logic synthesis, static timing
  • analysis, or power analysis.
  • Programming or scripting experience in Python, Tcl, Bash, or similar languages.
  • Familiarity with Linux environments and software development fundamentals, including
  • debugging and version control.
  • Strong creative, problem identification, analytical, debugging, and problem-solving skills with an
  • ability to work independently and collaborate across teams.
  • Interest in applying automation and emerging AI technologies to engineering problems.
  • Willingness to take lead on work, decisions, actions and consequences.

Preferred Qualifications

  • Hands-on experience with standard EDA tools from Synopsys, Cadence, or Siemens.
  • Understanding of timing constraints, timing closure, power optimization, and PPA tradeoffs.
  • Exposure to place and route (P&R), formal verification, physical verification (DRC/LVS), or related
  • signoff methodologies.
  • Experience with AI/ML technologies, including LLMs, RAG, AI agents, or agentic automation
  •  
  • Understand what to build and how to build it, rather than relying entirely on AI tools.
  • Experience developing Python-based tools, MCPs, APIs, or automation frameworks.
  • Up to date knowledge on AI (tools)

About Rambus 

Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads. Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.  

Rambus offers a competitive compensation package including base salary, bonus, equity, matching 401(k), employee stock purchase plan, comprehensive medical and dental benefits, time-off program, and gym membership.  


The US hourly range for this full-time position is $25.80 to $47.80. Our salary ranges are determined by role, level and location. The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. 


At Rambus, we are committed to fostering a workplace where every individual is respected, supported, and empowered to succeed. We value a range of perspectives and experiences that contribute to innovation and collaboration. Our goal is to ensure that all team members have equitable access to opportunities, resources, and a sense of belonging. We believe that a culture of fairness and inclusion helps us all do our best work. 

 Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.  

  

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures. If you require assistance or an accommodation due to a disability, please feel free to inform us in your application. 


Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services. 


For more information about Rambus, visit rambus.com. For additional information on life at Rambus and our current openings, check out rambus.com/careers/. 


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Skills Required

  • Currently pursuing a Bachelor's, Master's, or Ph.D. degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Understanding of digital logic design, RTL, and ASIC/SoC design fundamentals.
  • Familiarity with digital implementation methodology, including logic synthesis, static timing analysis, or power analysis.
  • Programming or scripting experience with Python, Tcl, Bash, or similar languages.
  • Familiarity with Linux environments and software development fundamentals, including debugging and version control.
  • Strong creative, analytical, debugging, problem-solving, independent work, and collaboration skills.
  • Interest in applying automation and emerging AI technologies to engineering problems.
  • Willingness to take lead on work, decisions, actions, and consequences.
  • Hands-on experience with standard EDA tools from Synopsys, Cadence, or Siemens.
  • Understanding of timing constraints, timing closure, power optimization, and PPA tradeoffs.
  • Exposure to place and route, formal verification, physical verification, DRC/LVS, or related signoff methodologies.
  • Experience with AI/ML technologies, including LLMs, RAG, AI agents, or agentic automation.
  • Experience developing Python-based tools, MCPs, APIs, or automation frameworks.
  • Up-to-date knowledge of AI tools.
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The Company
HQ: San Jose, CA
989 Employees

What We Do

Dedicated to making data faster and safer, Rambus creates innovative hardware, software and services that drive technology advancements from the data center to the mobile edge. Our architecture licenses, IP cores, chips, software, and services span memory and interfaces, security, and emerging technologies to positively impact the modern world. We collaborate with the industry, partnering with leading chip and system designers, foundries, and service providers. Integrated into tens of billions of devices and systems, our products and technologies power and secure diverse applications, including Big Data, Internet of Things (IoT) security and much more!

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