ASIC Physical Design Engineer, Proto

Company Description
Block is one company built from many blocks, all united by the same purpose of economic empowerment. The blocks that form our foundational teams - People, Finance, Counsel, Hardware, Information Security, Platform Infrastructure Engineering, and more - provide support and guidance at the corporate level. They work across business groups and around the globe, spanning time zones and disciplines to develop inclusive People policies, forecast finances, give legal counsel, safeguard systems, nurture new initiatives, and more. Every challenge creates possibilities, and we need different perspectives to see them all. Bring yours to Block.
Job Description
Team Overview
We believe everyone should be able to participate and thrive in the economy. We believe bitcoin plays an essential role in the future of payments and the world's economy. We believe that the status quo of bitcoin mining does not serve the mission of the bitcoin ecosystem. So we're building a bitcoin mining rig powered by Block designed custom ASICs. With our mining rig, we can address many issues such as the concentration of hardware supply in certain countries and incompatibility with clean energy sources.
As a senior ASIC Physical Design Engineer, you will work closely with other digital designers and mixed signal designers to develop the next generation of mining ASIC. In particular, the challenges of block level physical implementation, timing, integration, and physical verification are critical parts of this role.
We are a distributed team across the U.S. and Canada, and are hiring for a single remote position.
Our organization operates as a flat meritocracy, this role's title is ASIC Physical Design Engineer, but other companies might call this a Technical Lead, Lead Design Engineer, Senior/Staff or Member of Technical Staff role.
Qualifications
You Will:

• Perform block level P&R, and integration from early RTL to final tapeout
• Work closely with logic designers on block level timing closure
• Work closely with custom cell development
• Improve capacity and scalability of our full chip design flows
• Develop scripts to enhance current physical design infrastructure/methodology
• Collaborate with teammates from different functions and time zones

You Have:

• 10+ years of relevant experience with BSEE or Applied Science degree; 8+ years in combination with a MS degree
• Expert in using Synopsys ICC2/Fusion Compiler and PrimeTime
• Understanding of the full design cycle from RTL to GDSII, including chip level
• Prior experience with custom physical design and relative placement
• Successfully tapped out multiple chips in 5nm and below
• Experience with all aspects of block delivery including clock, power analysis, physical verification, etc.
• Understanding of timing constraints and timing reports
• Strong Python/Perl/shell/tcl skills
• Experience with Linux and or Unix and text editors
• Ability to work effectively in a fast-paced and rapidly changing start-up environment
• Excellent communication skills

Even better if you have experience with:

• CPU/GPU datapath or AI processor physical design

Qualifications
You Will:

• Perform block level P&R, and integration from early RTL to final tapeout
• Work closely with logic designers on block level timing closure
• Work closely with custom cell development
• Improve capacity and scalability of our full chip design flows
• Develop scripts to enhance current physical design infrastructure/methodology
• Collaborate with teammates from different functions and time zones

You Have:

• 10+ years of relevant experience with BSEE or Applied Science degree; 8+ years in combination with a MS degree
• Expert in using Synopsys ICC2/Fusion Compiler and PrimeTime
• Understanding of the full design cycle from RTL to GDSII, including chip level
• Prior experience with custom physical design and relative placement
• Successfully tapped out multiple chips in 5nm and below
• Experience with all aspects of block delivery including clock, power analysis, physical verification, etc.
• Understanding of timing constraints and timing reports
• Strong Python/Perl/shell/tcl skills
• Experience with Linux and or Unix and text editors
• Ability to work effectively in a fast-paced and rapidly changing start-up environment
• Excellent communication skills

Even better if you have experience with:

• CPU/GPU datapath or AI processor physical design