ASIC Design Verification Engineer

Reposted 3 Months Ago
Be an Early Applicant
3 Locations
In-Office
129K-207K Annually
Expert/Leader
Software • Semiconductor • Manufacturing
The Role
Lead constrained-random verification of high-throughput Ethernet ASICs for AI/ML acceleration using SystemVerilog/UVM testbenches, drive coverage closure, run simulations with VCS/Incisive, script automation, collaborate with global design and architecture teams, and provide technical leadership.
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Job Description:

Would you like to become part of a stable team developing silicon products for Ethernet systems in the Cloud?  Come join this team creating devices that accelerate AI/ML workflows!  This team develops high throughput Ethernet solutions that deliver unprecedented performance at critically important power efficiency.
We are looking for highly skilled and efficient Constrained Random Design Verification engineers that want to verify new designs that can evolve rapidly at every generation in a very dynamic market using industry proven methodologies using System Verilog and UVM.  You can become a member of an extremely skilled and efficient group of engineers.
This is a rare opportunity to be part of a team that leads products for a new line of devices. The candidate will work with our worldwide design and architecture teams to develop leading edge products. All aspects of Design Verification will be involved, along with opportunities for technical leadership.
 Skills:  Self motivated personality with a strong presence to do things right. Need to have a strong sense of teamwork and ability to work well with other.  Constrained random verification methodologies with experience driving completion via coverage closure.
Preferable to have skills with SV and UVM, well versed in OOP
Tools/Languages: System Verilog (TB structures - Class, SVA, etc.), UVM, VCS, Incisive, Scripting skills a + (Python, Perl, ...)
Experience: Bachelors and 12+ years of related experience or Masters degree and 10+ years of related experience or PhD and 3+ years of related experience

Additional Job Description:

Compensation and Benefits 

The annual base salary range for this position is $129,400.00 - $207,000.00.
  

This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements. 

  

Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence. 

Broadcom is proud to be an equal opportunity employer.  We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law.  We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Skills Required

  • Constrained random verification methodologies and experience driving completion via coverage closure
  • Bachelor's degree with 12+ years, Master's with 10+ years, or PhD with 3+ years of related experience
  • VCS (simulation tool)
  • Incisive (simulation tool)
  • System Verilog (including SVA)
  • UVM
  • Scripting skills (Python, Perl)
  • Well-versed in OOP
  • Self-motivated, strong teamwork and ability to drive quality

Broadcom Compensation & Benefits Highlights

The following summarizes recurring compensation and benefits themes identified from responses generated by popular LLMs to common candidate questions about Broadcom and has not been reviewed or approved by Broadcom.

  • Equity Value & Accessibility — Equity grants, including RSUs, stock refreshers, and an ESPP, are often described as top-tier and a primary driver of strong total compensation, especially for technical and senior roles. Once stock begins vesting, overall pay is commonly viewed as hard for other employers to match.
  • Retirement Support — A 401(k) match of 100% up to 6% with immediate vesting is frequently highlighted as a standout benefit. This structure provides strong long-term savings support.

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The Company
HQ: Palo Alto, CA
38,985 Employees
Year Founded: 1991

What We Do

Broadcom Inc. (NASDAQ: AVGO) is a global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

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